West Bengal Institute of Technology (WBIT) 2008-5th Sem B.Tech Computer Science and Engineering Computer Science - Microoprocessor & Microcontroller - Question Paper
CS/B.TBCH (CU/IT/ECE (OJ/EBB/PWl/H* (O))/8EM-/*I-B03/0/t0#) 3
ENGINEERING & MANAGEMENT EXAMINATIONS, DECEMBER - 2008 MICROPROCESSOR & MICROCONTROLLERS SEMESTER - 5
Time : 3 Hours ] [ Full Marks : 70
GROUP-A ( Multiple Choice Type Questions)
1. Choose the correct alternatives for any ten of the following : 10x1 = 10
i) The frequency of CLOCK OUT signal of8085 Is
a) 6 MHz b) 3 MHz
c) 6 kHz d) 2 MHz. -
ii). Which one of the following is the software interrupt of 8085 A microprocessor ?
a) RST 7-5 b) El c) RSTO d) none of these.
iii) If ready pin is grounded, it will introduce ......................... status into the bus
cycle of 8086 /8088 microprocessor.
a) wait b) idle
c) wait & remains idle d) all of these.
iv) What will be the content of PC after execution of the last instruction in the following program ?
B12Bh : LXI H, 9100H MOV A, M INR L ADD M
a) B130h b) B12Fh
c) B231h d) none of these.
/B.1BCB(C8E/mBCB(0)/Bn/rm/HB(O))/Sni.a/B-5<B/M/(<) 4
v) Whenever the POP H Instruction is executed
a) data bytes in the HL pair are stored on the stack
b) two data bytes at the top of the stack are transferredto the HL reg. pair
c) two data bytes at the top of the stack are transferred to the PC
d) two data bytes from the HL register that were previously stored on the stack
\ I I are transferred back to the HL registers. I-1
yi) For 8257 controller....................is the highest priority channel by default.
a) CH-3 b) CH-0
c) CH-1 d) any channel.
vii) If a DMA request is sent to the microprocessor with a high signal to the HOLD pin, the microprocessor acknowledges the request
a) after completing the present cycle
b) immediately after receiving the signal
c) after completing the program
d) none of these.
viii) In a partial port decoding scheme using 8 bit addressing, two address lines, A1 and AO are not connected to the decoding NAND gate. Which addresses are made redundant ?
CZ)
|
a) |
(00) H, |
(01)H. |
(03) H, |
(04) |
|
b) |
(00) H, |
(02)H. |
(13)h, |
d4) |
|
c) |
(13)H, |
(05)H, |
(03) H. |
(04)H |
|
d) |
(00) H, |
(01)H. |
(02) H, |
(03) h |
|
e) |
none |
of these. | ||
CS/B.TXCH (CSB/rT/BO (0)/m/PWE/BIX (O))/8EM-S/H-8aa/O8/(O0j 5
ix) Apart from certain arithmetic operations, RAL/RAR is useful for
a) DMA controlling
b) serial data transfer
c) decimal adjust operations
d) none of these
e} all of these.
x) Mode 5 of 8254 is
b) rate generator
a) square wave generator
c) software triggered strobe d) hardware triggered strobe.
xi) The conversion time of a 12 bit successive approximation type A/D converter using an 1 MHz clock Is
b) 12 microsecond
a) 1 microsecond
d) 4095 microsecond.
c) 4096 microsecond
xil) The instruction : EXHG exchanges the contents of
a) Acc & H
b) BC-pair & HL-pair
c) DE-pair & HL-pair
d) HL-pair and a memory location.
ca/a.Tcai (cas/ir/ccs loi/mm/m (oii/am-s/Bi-soa/M/tos) 6
GROUP-B (Short Answer Type Questions )
Answer any three of the following. 3x5= 15
2. Write a program In assembly language for 8085* nP to generate a square wave of 10 kHz with the Input clock frequency of 1 MHz of counter 0.
3. In memory mapped I/O, how does microprocessor differentiate between an I/O and Memory ? Can Memory and I/O have the same address ? Compare Memory mapped I/O and Peripheral Mapped I/O. 2+1+2
4. a) In the context of 8279 programmable keyboard/display interface, explain the
terms 2 key lock out" & N key roll over".
b) What do you mean by ICW & OCW ? 3 + 2
5. a) What do you mean by pipelined architecture ? How is it implemented in 8086 ?
b) Discuss flag register of 8086. 1 + 2 + 2
6. a) Find the memory address range for the following diagram shown below :
b) Calculate the number of memory chips needed to design 8K-Byte memory if the memory chip size is 1024* 1.
GROUP-C ( Long Answer Type Questions )
Answer any three of the following questions. 3 x 15 = 45
7. a) What will be the content of Accumulator and Flag after the execution of following
instructions ? 2 + 2
MVI A, 01H
MVI B, 02 H
ADD B
XRA A
HLT
b) Write an Assembly Language Program to set all the bits'of Flag register. 4
c) What are the advantages of indirect addressing mode over direct addressing mode ? 2
d) What do you mean by monitor program ? 2
e) How can microprocessor distinguish between instruction and data ? 3
8. a) Draw the timing diagram of op-code fetch machine cycle. 3
b) What is meant by subroutine ? Briefly discuss the sequence of events that takes place while executing CALL instruction. 4
c) Write an assembly program in 8085 y,P to generate/some time delay using a register pair. Also calculate the delay for your program, assuming clock period of 320 ns. 5
d) What are RIM and SIM ? Write their functions. 3
aooa/goov
nSKgiwy*1
C8/B.TECH (CSE/IT/ECE (Ol/EEE/PWE/EIE (0))/SEM-5/EI-S02/08/(08) 8
9. a) Draw the block diagram of 8254 timer & briefly discuss its different sections. 5 bj What do you mean by Mode 0, Mode 1, Mode 2 operations of 8255 PPI ? 3
c) Write a BSR control word subroutine to set bits PC5 & PC7 & reset them after 10 millisecond. Assume that delay subroutine is available. 2
d) In Mode 1 operation of 8255 PPI, what Eire the control signals when ports A & B act as input ports ? Discuss the control signals. 5
10. a) What is the size of data bus and address bus of 8086 [iP ? What is the size of
addressable memory present in 8086 [xP ? 3
b) Explain the operations of BIU and EU present in 8086 |xP. 4
c) What are the different types of segment registers present in 8086 nP ? 2
d) What is the difference between MAX Mode operation and MIN Mode operation in 8086 nP ? 4
e) What is the function of BHE pin in 8086 jxP ? 2
11. a) With respect to 8237 explain the DMA operation. 4
b) What are the priorities of DMA request ? Enumerate them. 3
c) What are the different transfer modes of 8237 ? Explain them in brief. 3
d) How many modes of operation are there in 8253 ? Just name them. 3
e) What is 8279 better known as ? 2
END
55001 (5/12)
|
Attachment: |
| Earning: Approval pending. |
