Kerala University 2010-5th Sem B.Tech Computer Science and Engineering Computer - Microprocessors and Interfacing - Question Paper
MODEL QUESTION
B.Tech. Degree Examination Nov./Dec 201Q
FIFTH SEMESTER COMPUTER SCINCE & ENGINEERING
08 505 MICROPROCESSORS AND INTERFACING
Time:3 Hour Maximum Marks 100
PART A
[Answer ALL queslions, each carries A marks)
I. Any information in the memory of a computer is stored as is and 0s. How does the processor know an ilem stored in a mernory location is a data or an instruction?
1. Draw the timing diagram for op-code letch.
3. Illustrate how the low-order address bus of 8085 is de-multrptexed
4. Explain the principle of working ot successive - approximation A/D converter,
5. Compare and contrast 8086 microprocessor with 8088.
6 Explain the function of the following signals of 8086 :
(a) TEST (b) LOCK (c) MN f MX (d) READY
7 Write an assembly language program to- find Hie largest number in given unordered array of 8-bit numbers.
8 Write a program segment fo generate a pulse every 50 micro second from counter 0 of 8254. The address or counter 0 is 80H and the clock speed of 80B& is ?MHz.
9 List major components of 8251 US ART and mention their functions.
]0 An 8755A has o system base address of FFF9H.Write the initialization commands required to program all ports 8255A as output ports in mode 0,
PART a
[Answer ore FULL question from each module} ~~
Module 1
11 (o) With a diagram. explain the functional unils of 6085 microprocessor (12 Murks)
(b) tl is required 1o interlace one chip of 16K x 8 ROM and one chip of 32K x 8 RAM with BOBS. ROM address slarts at OOOOH. Show ttie implementation of this memory system.
). 18 Works)
12(a) Draw and explain the schematic o< a micro computer by illustrating processor, memory modules, address bus, doto bus and control signals (10 Marks)
[ P T. O]
(b) Explain with a diagram how a 12-bit DAC[Digital to Analog Converter) con be interfaced with 6065 microprocessor.
It the DAC is catibf a ted over the ran ge 0 to 10V calcutate the outpu ts if 1 ho Inpu I ii 01H and 82H.
(10 Marks)
Module 2
13(a) Explain the physical memory organization in an 8086 system, whol is the maximum memory oddresjing and I/O addressing capability ot 8086 ? [10 Marks]
jb)Write an 8066 based assembly language program lo sort a sel of 100 swleen bit numbers in non- decreasi ngordei D (10 Marks |
Ufa} Explain Ihe tunctionol units of 8259 interrupl controller (12 Marksf
(15) Write 60B6 based initialization instructions and commands for 3259 to meet the following specifications: (i) Single (ii) Level triggered (i!ij Call address interval 4 (iv) Interrupt type 40 corresponds lo IR0 input (v) Normal EOI (vi)Non buffered mode (vii)Not specialty fully nested mode | viii) IR1 and IR3 unmasked, The base address of 8259 is FF10H. {8 Marks)
Module 3
15(a) Discuss the various modes operation of 8255 Programmable Peripheral Interlacing,
An8255A has a system base address, of fTFlQH. What are Ihe system addresses for the three ports and the control register for this 9255a. Show Ihe &SR made conlfoi words needed lo initialize an 6255 (i) to set PC3(ii) to reset PCS [12 Marks)
(b) Describe the series ot actions that a DMA controtler will perform after it receives request From o peripheral device to transfer data to memory, (8 Marks)
14(a) Explain the idea of multiplexing a seven digit 7-scgment display. j 10 Mcnks)
jb] Expiain the various funclional unils of 8279 used to conlrol the key board and display of a system ( io Maries)
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