Thapar University 2006 B.E Computer Science Network System Design - Question Paper
Thapar Institute of Engineering & Technology
B.Tech CS (2nd Year)
Final Term exam
CS005 (Network System Design)
Computer Science and Engineering Department Thapar Institute of Engineering and Technology
CS-005 Network System Design End-Semestcr Examination 7'1' December 2006
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Time allowed: 3-hr. Instructor: Manindcr Singh
Max. Marks 36
Note: a) Question no. 1 is compulsory, b) Attempt any 4 out of remaining 6 questions.
Ql. a) What is the difference between the Workbench and the Transactor?
b) How do vou develop code for the Strong ARM Core? Give complete details about the tool set and required configurations.
c) Draw 1XP1200 block diagram and explain working of each unit in detail.
(1,2,5)
Q2. Discuss the key architectural features of 1XP1200. Baseline your comments on the following kev issues: Multi-Processing, Distributed Data Storage Architecture, Hardware Multi-Threading, Active Memorv Optimization, Concurrency, Block Transfers and Scalability.
Q3. A Microengine can issue a Reference Command, and then swap out, allowing another thread (within the same Microengine) to run. In this way, while one Microengine thread is waiting for data, or some operation to complete, another thread is allowed to run and complete some useful work. Explain this concept of Context Swapping and Threading in detail with help of neat diagrammatical representanons.
Q4. Trace the sequence of steps a packet travels with in IXP1200, starting from the point when Ethernet MAC receives data.
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Q5. a) Explain the functionality provided by SRAM and SDRAM units. b) What do you mean by Zero-Overhead when a context switch occurs? c) I.ist down major application areas where a Network Processor is best suited, lake one example area and layout its design using IXP1200. |
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b) What are various Packet Processing Function which could be performed by a Network Processor? Explain Address Lookup And Packet Forwarding function in detail.
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| Earning: Approval pending. |
