Other Bachelor Degree- DIGITAL PRINCIPLES AND SYSTEM DESIGN(Karunya University, Coimbatore-2012)

Reg. No. ________                                                                                                                                                      

Karunya University

(Karunya Institute of Technology and Sciences)

(Declared as Deemed to be University under Sec.3 of the UGC Act, 1956)

 

Supplementary Examination – June 2012

 

Subject Title: DIGITAL PRINCIPLES AND SYSTEM DESIGN                                        Time: 3 hours

Subject Code:            09IT204                                                                                                                             Maximum Marks: 100           

                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               

Answer ALL questions

PART – A (10 x 1 = 10 MARKS)

 

1.         State De Morgan’s Law.

2.         Obtain the binary equivalent of hexadecimal number (AC.CB).

3.         Name two HDL.

4.         Draw the circuit for half adder.

5.         What is ROM?

6.         Define encoder.

7.         What is latch?

8.         Draw the truth table for T flip-flop.

9.         What is asynchronous sequential logic?

10.       Define hazards.

 

PART – B (5 x 3 = 15 MARKS)

 

11.       State any three Boolean laws.

12.       Draw the truth table and circuit for full adder.

13.       Differentiate encoder and multiplexer.

14.       Draw the circuit and truth table for D flip-flop.

15.       What is race in asynchronous sequential logic circuits?

 

PART – C (5 x 15 = 75 MARKS)

 

16.       Simplify F = Ʃm (1, 3, 7, 11, 15) + d (0, 2, 5) using K-map.                                                 

(OR)

17.       What are universal gates? Design Ex-OR gate using NAND and NOR logic.                                            

 

18.       Design a full subtractor circuit.                      

(OR)

19.       Realize a BCD to Gray code conversion circuit starting from its truth table.                                   

 

20.       Explain with neat diagram a BCD to 7-segment display decoder.                                                   

(OR)

21.       Explain about PROM, PLA and PAL in detail.                                                                    

 

22.       Design and implement a Mod-10 synchronous counter using D flip-flop.

(OR)

23.       Explain about various types of shift registers in detail with neat diagrams.                         

 

24.       Explain the design procedure of asynchronous sequential circuit with necessary steps.                   

(OR)

25.  Design an asynchronous sequential circuit with two inputs X and Y and with one output Z. Whenever Y is 1, input X is transferred to Z. When Y is 0, the output does not change for any change in X.

Earning:  ₹ 0.00/-