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M.Tech-M.Tech Nanotechnology Analog and Mixed Signal Integrated Circuits(Sathyabama University, Chennai, Tamil Nadu-2012)

Monday, 19 August 2013 06:53Duraimani
SATHYABAMA UNIVERSITY
(Established under section 3 of UGC Act,1956)
Course & Branch :M.Tech - NANO/W-VLSI                                    Max. Marks:80
Title of the Paper :Analog and Mixed Signal Integrated Circuits
Sub. Code :782204 (2008-2009)                                                      Time : 3 Hours
Date :01/06/2012                                                                           Session :FN
                                       PART - A                                 (6 x 5 = 30)
                        Answer ALL the Questions
1.     Explain the simplified structure of a MOS device with a neat sketch.
2.     Explain the effect of Charge injection in Switched-Capacitor circuits.
3.     Discuss on various OPAMP design parameters.
4.     Explain about an Interpolating Analog to Digital Converter (ADC).
5.     Explain the fundamental concept of data converters.
6.     A 1 V peak-to-peak sinusoidal signal is applied to an ideal 10-bit D/A converter, which has a VREF of 5 V. Find the maximum SNR of the digitized analog output signal.

PART – B               (5 x 10 = 50)
Answer ALL the Questions
7.     Draw the small signal model of CS stage with resistive load and derive the expression for voltage gain.
(or)
8.     Explain indetail the qualitative analysis of a simple MOS differential pair with its input – output characteristics.
9.     Describe the Switched-Capacitor Integrators with suitable diagrams and expressions.
(or)
10.   Design a Switched-Capacitor realization for a first-order, high-pass circuit with a high-frequency gain of – 10 and a – 3dB frequency of 1kHz using a clock of 100kHz.
11.   Explain indetail the configuration of open loop and closed loop sample and hold circuit and its characteristics.
(or)
12.   Explain the basics of band gap reference in CMOS technology.
13.   Assume that the sampled analog input to a 4-bit pipeline algorithmic ADC is 0.3215VREF and find the digital output word to 8-bits.
(or)
14.   Describe a Delta-Sigma DAC with relevant diagrams and expressions.
15.   Explain indetail the different types of switched capacitor amplifiers with neat diagrams.
(or)
16.   Draw the simple charge pump PLL circuit and explain the behavior operation. 

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