North Maharashtra University 2008 B.E Computer Science and Engineering Computer Organisation, S.E CSE /E - Question Paper
NORTH MAHARASHTRA UNIVERSITY
MAY/JUNE 2008 examination
SUB: Computer Organisation.
YEAR: second year of engg. (2nd sem of Computer science & Engineering)
Max. Marks: 100.
Time: three hrs.
llin* ; Three Hour* P& 4** i <*3
Instructions to Candidates : M
1. . Do not write anything on question paper except Seat No.
2. Answer any two questions from each unit.
3. Assume suitable data, if necessary.
4. Draw neat and labelled diagram, wherever necessary.
5. Figures to right indicate full marks
UNIT - I
1. Processor F\, and Pj are zero, one and two address processor
respectively. Write programs for P[, P2 ond Pj to compute the
following function.
Z{A + B)/(C-D*E) 10
2. Draw and discuss different bus structures used to connect basic functional units of a computer to form a operatk>rtal system. 10
3. a) Describe the concept of fixed and expanding opcodes with their
advantages and disadvantages ? 6
b) Discuss briefly any two addressing modes of motorola 68000
4. a) Multiply the following pair of numbers using booths algorithm 0 -llx-13 1) -15*21-
t
b) Using an example show how rounding Is achieved
l
S* *) Multiply the following pair of numbers using bit pair recording
method ;
8
b) Represent the number -19in 1'* complement and 2s complement form ?
6. a) Represent the number _ 12.785 and 0 0765 fn IEEE 754 single precision format ?
6
b) perform division of 24 by 5 using non-restoring division algonthm 4
UNIT - III
7. a) For a single bus CPU, write the sequence of ii instructions to
execute an instruction MUL A, NUM. where A Is an CPU register and NUM is a memory location. Address of NUM is part of instruction. 8
b) Draw the structure of 2910 4 bit bit sliced ALU ? 2
. Compare microprogrammed control unit with hardwired control
unit on any 7 grounds ?
9. Design an 16 bit ALU, composed of 4 bit bit sliced 2901 processor
wtth a carry look ahead ?
UNIT - IV
10, a) A block set a associative cache of 8 KB has 8 sets with 8 bkxks
per set. CPU refers the main memory in thc address rang*
000000 - FFFFFFH.
I) Find the number of bits in TAG, WORD and SET field, ii) If CPU happens to refer mam memory at the following
rtidreues clearly indicate where these will be mapped m cache
j) 13579A4 H) ABCDEFH ill) 1B5D9FH 8
b) Define the terms page fault and dirty bit ?
9
11.) Compare SRAM, DRAM and RDRAM on atleast 4 points ?
b) Define the term memory access time ?
12. a) Describe high-order and low-order memory interleaving with their
pros and cons ?
bj Describe briefly features of flash memory ? With its applications ?
UNIT - V
13. a) Compare RISC and CISC on atleast 6 grounds ? b) Draw and describe briefly a selector channel ?
14. a) Describe UNIBUS standard with reference to its signals, need.
timing diagrams and advantages.
b) List any 4 goals conceived to be achieved by USB design ?
15. a) Discuss SCSI bus with reference to Its need, signals, data transfer
mechanism and bus arbitration ?
b) Give the use of any two control signals in IEEE 488 bus ?
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| Earning: Approval pending. |
