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Madras University (UnOM) 2006 B.C.A Computer Application Digital Logic Fundamentals - Question Paper

Monday, 12 August 2013 01:30Web

Time: 3 hours
Maximum: 100 marks

PART A - [5 x eight = Marks 40]

ans any 5 ques..
All ques. carry equal marks.

1. Convert the subsequent numbers as directed.
(a) (345.625)10 into its binary equivalent
(b) (FED)16 into its decimal equivalent.

2. decrease the subsequent Boolean expressions into its minimal form:

(a) W(K,L,M)=KL+LM+KM
(b) Z(A,B,C,D,E,F)=A +AB +ABC+ABCD + ABCDE + ABCDEF.

3. Write the truth table of an OR gate and discuss its behaviour. Realise an OR gate using NAND gates only.

4. Draw the circuit using gates of an SR flip flop and find its truth table.

5. Draw the circuit of a radix-8 synchronous up counter and using timing diagrams discuss its working.

6. Sketch the circuit of a half subtractor. Show how a full subtractor is built using half subtractors.

7. Draw the gate four one it of a one to four de-multip and discuss its working

8. State and discuss the functions of the various logical components of an ALU.


PART B - [3 x 20 = Marks 60]
ans any 3 ques..
All ques. carry equal marks.

9. define in detail fault detecting and fault correcting codes. Bring out their advantages and disadvantages as fault detectors.

10. A combination circuit provide an output one if there are exactly 2 ones in the input. Using a Karnaugh map design the circuit.

11. Design a counter to count the sequence 000, 001, 011, 111, 110, 100, 000....

12. Using a suitable multiplexer design a circuit to provide

X (A, B, C, D) = Y- 0, 2, 3, 5, 7, 8, 9, 12,15.

13. What is a status register? elaborate its uses? How is a status register designed?


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