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Jawaharlal Nehru Technological University Kakinada 2010-2nd Sem M.Tech Computer Science & Engineering Supplementary s Advanced Computer Architecture (CSE - CS Engineering) - Question Pap

Sunday, 11 August 2013 03:15Web

Subject Code: B5807
M.Tech II Semester Supplementary exams June 2010
Advanced Computer Architecture
(CSE - CS Engineering)
Time: three Hours Max Marks: 60
ans any 5 ques. All ques. carry EQUAL marks

1. define the guidelines and principles that are useful in design and analysis of computers
2. a) define the optimizations performed by modern compilers.
b) define memory addressing modes usually supported by systems.
3. Name typical data hazards in pipeline systems. How dynamic schedule helps to overcome
these hazards?
4. a) What is loop unrolling? How loop unrolling improves scheduling ILP?
b) What is trace Scheduling and hoe does it help to uncover parallelism in ILP
5. a) define the techniques for fast address translation from virtual space to physical Space .
b) Summarize cache optimization technique and show its impact on its performance
6. What is cache coherence? define a few cache coherence mechanisms
7. a) Name the problem involved in the design of a I/O systems
b) define the features of RAID
8. Write short not on subsequent
(a) Congestion control
(b) Multi threading


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