Jawaharlal Nehru Technological University Kakinada 2008 B.Tech Electrical and Electronics Engineering SWITCHING THEORY AND LOGIC DESIGN - Question Paper

Code No: 07A3EC03 Set No. 1
II B.Tech I Semester Regular Examinations, November 2008
SWITCHING THEORY AND LOGIC DESIGN
( Common to Electrical & Electronic Engineering, Electronics &
Instrumentation Engineering, Bio-Medical Engineering, Electronics &
Control Engineering, Electronics & Computer Engineering and
Instrumentation & Control Engineering)
Time: three hours Max Marks: 80
ans any 5 ques.
All ques. carry equal marks
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1. (a) What is the Gray code? elaborate the rules to construct Gray code? Develop
the four bit Gray code for the decimal 0 to 15.
(b) List the XS3 code for decimal 0 to 9.
(c) elaborate the rules for XS3 addition? Add the 2 decimal numbers 123 and
658 in XS3 code. [8+2+6]
2. (a) State Duality theorem. List Boolean laws and their Duals.
(b) Simplify the subsequent Boolean functions to minimum number of literals:
i. F = ABC + ABC’ + A’B
ii. F = (A+B)’ (A’+B’).
(c) Realize XOR gate using minimum number of NAND gates. [8+4+4]
3. Simplify the subsequent Boolean expressions using K-map and implement them using
NOR gates:
(a) F (A, B, C, D) = AB’C’ + AC + A’CD’
(b) F (W, X, Y, Z) = W’X’Y’Z’ + WXY’Z’ + W’X’YZ + WXYZ. [16]
4. (a) Design BCD to Gray code converter and realize using logic gates.
(b) Design 2*4 decoder using NAND gates. [10+6]
5. (a) Draw the basic macro cell logic diagram and discuss.
(b) discuss the general CPLD con?guration with suitable block diagram. [16]
6. (a) Draw the logic diagram of a four bit binary ripple counter using positive edge
triggering.
(b) Draw the block diagram of a four - bit serial adder and discuss its operation.[16]
7. (a) Write the di?erences ranging from Mealy and Moore kind machines.
(b) A sequential circuit has two inputs w1=w2 and an output z. It’s function is
to compare the i/p sequence on the 2 i/p’s. If w1=w2 during any four
consecutive clock cycles, the circuit produces z=1 otherwise z=0
w1= 0110111000110
w2= 1110101000111
z=0000100001110 [8+8]
1 of 2Code No: 07A3EC03 Set No. 1
8. (a) For the provided control state diagram find its equivalent ASM chart.
(b) Design control logic circuit as shown in ?gure 8b using multiplexers. [8+8]
Figure 8b
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2 of 2Code No: 07A3EC03 Set No. 2
II B.Tech I Semester Regular Examinations, November 2008
SWITCHING THEORY AND LOGIC DESIGN
( Common to Electrical & Electronic Engineering, Electronics &
Instrumentation Engineering, Bio-Medical Engineering, Electronics &

Earning:   Approval pending.