Jawaharlal Nehru Technological University Kakinada 2007 B.Tech Computer Science and Engineering digital logic design - Question Paper

F = xy + x y + y z.
(b) Using the rules of boolean algebra, simplify the expressions that follow to the
fewest total number of literals. [8+8]
i. f = AB + ABC + ACD
ii. f = B + AD+BC + [B+A(C+D)]
1
3. Simplify the subsequent Boolean function using four-variable map.
F (w, x, y, z) = S (1, 3, 7, 11, 15) + d(0, 2, 5). [16]
4. (a) discuss carry propagation in parallel adder with a neat diagram.
(b) What is a decoder? Construct a 4×16 decoder with 2 3×8 decoders. [8+8]
5. A Sequential circuit with 2 D ?ip-?ops A and B, 2 inputs x and y and one
output z is speci?ed by the subsequent next-state and output formula. [16]
A(t + 1) = xy + xA
z = B
B(t + 1) = xB + xA
.
(a) Draw the logic diagram of the circuit.
(b) List the state table for the sequential circuit.
(c) Draw the corresponding state diagram.
6. (a) Write about the HDL behaviral description of a 4-bit shift register.
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(b) Write about serial adder. [8+8]
7. discuss about fault detection and correction with example. [16]
8. (a) Write a procedure for analysing an asynchronous sequential circuit with SR
latch.
(b) discuss in detail about debounce circuit. [8+8]
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2 of 1Code No: 07A3EC16 Set No.3
II B.Tech. I Semester Regular Examinations, November -2008
DIGITAL LOGIC DESIGN
( Common to Computer Science & Engineering,Information Technology and
Computer Science & Systems Engineering)
Time: three hours Max Marks: 80
ans any 5 ques.
All ques. carry equal marks
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1. (a) Perfprm the subsequent binary multiplication operations
i. 100010 × 001010 =
ii. 001100 × 011001 =
iii. 000100 × 010101 =
(b) Write the one’s and two’s complements of the subsequent example.
i. 0011001
ii. 1110011
iii. 111111. [10+6]
2. (a) State and discuss the Duality principle with example.
(b) provided the Boolean function
F = xyz + xyz + wxy + wxy + wxy
i. find the truth table of the function
ii. Draw the logic diagram using the original Boolean expression
iii. Simplify the function to a minimum number of literals using Boolean
algebra.
[6+10]
3. obtain all the prime implicatiants for the subsequent Boolean functions and determine
which are essential.
F(A,B,C,D) = S(0, 2, 3, 5, 7, 8, 10, 11, 14, 15) [16]
4. (a) What is meant by encoder?
(b) Design a four - input priority encoder. [4+12]
5. Write the HDL behavioral description of a
(a) D ?ip - ?op
(b) F ?ip - ?op. [8+8]
6. (a) Design a Serial Adder.
(b) Write a HDL behavioural description of shift register. [8+8]
7. (a) discuss about internal construction of 4×4 RAM.
1 of 1Code No: 07A3EC16 Set No.3
(b) Design a combinational circuit using a ROM. The circuit accepts a 3-bit num-
ber and generates an output binary numbers equal to the square of the input
number.
[8+8]
8. (a) discuss the di?erence ranging from asynchronous and synchronous sequential cir-
cuits.
(b) Write about Hazards in sequential circuits. [8+8]
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2 of 1Code No: 07A3EC16 Set No.4
II B.Tech. I Semester Regular Examinations, November -2008
DIGITAL LOGIC DESIGN
( Common to Computer Science & Engineering,Information Technology and
Computer Science & Systems Engineering)
Time: three hours Max Marks: 80
ans any 5 ques.
All ques. carry equal marks
? ? ? ? ?
1. (a) obtain the decimal equivalent of the subsequent two’s complement numbers.
i. 11111
ii. 10001
iii. 01010
iv. 10011
v. 10101
(b) discuss about fault Detecting code with example. [10+6]
2. (a) Simplify every of the subsequent expressions
i. ABCD + ABCD + CD
ii. (A + B) (A + B + D) (B + C + D)
(b) discuss about positive and Negative logic in binary signals. [8+8]
3. find
(a) Sum of product and
(b) Product of sum expressions for the function provided beneath
F (A, B ,C , D) = S(0, 1, 2, 5, 8, 9, 10) [16]
4. (a) Implement a Boolean function
F (x, y, z)= S (2, 4, 6) with a Multiplexer.
(b) discuss about Tri - State gates in digital systems. [8+8]
5. Design a sequential circuit with 2 JK ?ip - ?ops A,B with 1 input X and one
out put Y.
A (t + 1) = Ax + Bx
B (t + 1) = Ax
Y = Ax + Bx. [16]
6. (a) Design a serial Adder using shift register.
(b) Write a HDL behavioral description of shift register. [8+8]
7. (a) discuss about internal construction of 4×4 RAM with neat diagram.
(b) Design a combinational circuit using a ROM. The circuit accepts a 3- bit
number and generates an output binary number equal to the square of the
input number.
[8+8]
1 of 1Code No: 07A3EC16 Set No.4
8. (a) discuss the di?erence ranging from asychronous and synchronous circuit.
(b) De?ne fundamental - mode operation.
(c) discuss the di?erence ranging from stable and unstable states.
(d) What is the di?erence ranging from an internal state and a total state.[4+4+4+4]
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Earning:   Approval pending.