Jawaharlal Nehru Technological University Kakinada 2009 B.Tech Computer Science and Engineering Digital logic and design - exam paper

3.    Implement the following Boolean function with NAND gates

F (x,y,z) = E (1,2,3,4,5,7).    [16]

4.    Design a code converter that converts BCD to excess - 3 code.    [16]

5.    (a) Discuss indetail about sequential circuit.

(b) Construct a JK flip-flop using a D flip-flop, a 2-to-1 multiplexer and inverter.

[8+8]

6.    (a) Design a serial Adder in shift registers.

(b) Write a HDL behavioral description of shift register.    [8+8]

7.    (a) Explain about internal construction of 4 x 4 RAM

(b) Design a combinational circuit using a ROM. The circuit accepts a 3-bit number and generates an output binary number equal to the square of the input number.    [8+8]

8.    Explain about SR Latch with example.    [16]

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II B.Tech. I Semester Regular Examinations, November -2008 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering,Information Technology and Computer Science & Systems Engineering)

Time: 3 hours    Max Marks: 80

Answer any FIVE Questions All Questions carry equal marks k k k k k

1.    (a) Convert the following numbers.    [4x=8]

i.    ⁽53⁾io = ^{( )}2

ii.    (231)4 = ( )io

iii.    (1 1 0 1 1 0 1)2 = ( )s

iv.    (4D.56)i6 = ( )2

(b) Add and subtract in binary    [4x=8]

i.    1 1 1 1 and 1 0 1 0

ii.    1 1 0 1 1 0 and 1 1 1 0 1

iii.    1 0 0 1 0 0 and 1 0 1 1 0

iv.    1 1 0 1 0 0 1 and 1 1 0 1 1

2.    (a) Implement the following Boolean function using AND, OR and inverter gates.

F = xy + x y + y z.

(b) Using the rules of boolean algebra, simplify the expressions that follow to the fewest total number of literals.    [8+8]

i.    f = AB + ABC + ACD

ii.    f = B + AD+BC + [B+A(C+D)]¹

3.    Simplify the following Boolean function using four-variable map.

F (w, x, y, z) = (1, 3, 7, 11, 15) + d(0, 2, 5).    [16]

4.    (a) Explain carry propagation in parallel adder with a neat diagram.

(b) What is a decoder? Construct a 4x16 decoder with two 3x8 decoders. [8+8]

5.    A Sequential circuit with two D flip-flops A and B, two inputs x and y and one output z is specified by the following next-state and output equation.    [16]

A(t + 1) = xy + xA

z = B .

B(t + 1) = xB + xA

(a)    Draw the logic diagram of the circuit.

(b)    List the state table for the sequential circuit.

(c)    Draw the corresponding state diagram.

6.    (a) Write about the HDL behaviral description of a 4-bit shift register.

(b) Write about serial adder.    [8+8]

7.    Explain about error detection and correction with example.    [16]

8.    (a) Write a procedure for analysing an asynchronous sequential circuit with SR

latch.

(b) Explain in detail about debounce circuit.    [8+8]

k k k k k

II B.Tech. I Semester Regular Examinations, November -2008 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering,Information Technology and Computer Science & Systems Engineering)

Time: 3 hours    Max Marks: 80

Answer any FIVE Questions All Questions carry equal marks k k k k k

1.    (a) Perfprm the following binary multiplication operations

i.    100010 x 001010 =

ii.    001100 x 011001 =

iii.    000100 x 010101 =

(b) Write the ones and twos complements of the following example.

i.    0011001

ii.    1110011

iii.    111111. [10+6]

2.    (a) State and explain the Duality principle with example.

(b) Given the Boolean function

F = xyz + xyz + wxy + wxy + wxy

i.    Obtain the truth table of the function

ii.    Draw the logic diagram using the original Boolean expression

iii.    Simplify the function to a minimum number of literals using Boolean algebra.

[6+10]

3.    Find all the prime implicatiants for the following Boolean functions and determine which are essential.

F(A, B, C, D) = E (0, 2, 3, 5, 7, 8,10,11,14,15)    [16]

4.    (a) What is meant by encoder?

(b) Design a 4 - input priority encoder.    [4+12]

5.    Write the HDL behavioral description of a

(a)    D flip - flop

(b)    F flip - flop.    [8+8]

6.    (a) Design a Serial Adder.

(b) Write a HDL behavioural description of shift register.    [8+8]

7.    (a) Explain about internal construction of 4x4 RAM.

(b) Design a combinational circuit using a ROM. The circuit accepts a 3-bit number and generates an output binary numbers equal to the square of the input number.

[8+8]

8. (a) Explain the difference between asynchronous and synchronous sequential circuits.

(b) Write about Hazards in sequential circuits.    [8+8]

kkkkk

II B.Tech. I Semester Regular Examinations, November -2008 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering,Information Technology and Computer Science & Systems Engineering)

Time: 3 hours    Max Marks: 80

Answer any FIVE Questions All Questions carry equal marks k k k k k

1.    (a) Find the decimal equivalent of the following twos complement numbers.

i. 11111

ii. 10001

iii. 01010

iv.    10011

v.    10101

(b) Explain about error Detecting code with example.    [10+6]

2.    (a) Simplify each of the following expressions

i.    ABCD + A BCD + CD

ii.    (A + B) (A + B + D) (_? + C + D)

(b) Explain about positive and Negative logic in binary signals.    [8+8]

3.    Obtain

(a)    Sum of product and

(b)    Product of sum expressions for the function given below

F (A, B ,C , D) = E(0,1, 2, 5, 8, 9,10)    [16]