Jawaharlal Nehru Technological University Kakinada 2009-1st Sem B.E Electronics

of function table.
(b) calculate the maximum fan-out for the subsequent cases.
i. 74LS driving 74F
ii. 74F driving 74AS
iii. 74AS driving 74LS
iv. 74AS driving 74F [8+8]
3. (a) Write a VHDL Entity and Architecture for a 3-bit synchronous counter using
Flip-Flops.
(b) discuss the use of Packages. provide the syntax and structure of a package in
VHDL. [8+8]
4. (a) Design a logic circuit to detect prime number of a 4-bit input? Write the
VHDL program for the identical in structural style of modelling.
(b) Design the logic circuit and write a data-flow style VHDL program for the
subsequent function? [8+8]
F(X) = A,B,C,D (3, 5, 6, 7, 10, 13, 14) + d (1, 2, 4, 15)
5. (a) Write a VHDL program for 74×245?
(b) provide the logic diagram of 74×139. discuss with the help of truth table. Using
this device design a three to eight decoder and give the truth table. [8+8]
6. Design a combinational logic circuit that counts the number of ones in a 24-bit
register. Write a VHDL program for the identical using structural style or modeling.
[16]
7. (a) discuss LFSR. Design a4-bit LFSR using flip-flops and associated logic. List
out all states with initial state as 0101.
(b) Design an 8-bit serial-in and serial-out shift register. Write the data-flow style
VHDL program for this shift register. [8+8]
8. (a) How many ROM bits are needed to build a 16-bit adder/subtractor with
mode control, carry input, carry output and two?s complement overflow out-
put? Show the block schematic with all inputs and outputs?
(b) Design an 8×4 diode ROM using 74×138 for the subsequent data starting from
the 1st location. [8+8]
B, 2, 4, F, A,D, F,E


Code No: S0401 / R05 Set No. 3
III B.Tech I Semester Supplimentary Examinations, May/June 2009
DIGITAL IC APPLICATIONS
( Electronics & Communication Engineering)
Time: three hours Max Marks: 80
ans any 5 ques.
All ques. carry equal marks

1. (a) Draw the resistive model of a CMOS inverter and discuss its behavior for
LOW and HIGH outputs.
(b) Compare HC, HCT, VHC and VHCT CMOS logic families with the help of
output specifications and with VCC from 4.5V to 5.5V? [8+8]

Earning:   Approval pending.