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Vellore Institute of Technology 2008 MS Software Engineering Model (Digital Computer Fundamentals) - Question Paper

Friday, 01 February 2013 07:25Web




VIT

U N I V E R S I T Y

(Estd. u/s 3 of UGC Act 1956)

 

School of Electrical Sciences

 

 

Discipline: M.S(SE) Semester:II

Subject: DIGITAL COMPUTER FUNDAMENTALS

Model question paper Full Marks:100 Time: 3 hrs

 


Answer any 10 questions: 10*5=50

1. Perform the following decimal in 8421

    1. 12-34(using 9s complement) (2)
    2. 579+012 (2)
    3. Convert the 3608 into BCD (1)
  1. Using K-map, find the SOP of F=∑(0,4,8,12,3,7,11,15)+d(5) (5)
  2. Implement Y=(A+B)(A+D) (A+B+C) using NOR gates only (5)
  3. Design a network to convert 8241 to exess-3 code
  4. Explain the operation of 4 to 10 line decoder with necessary logic diagram.
  5. Design a synchronous mod-3 counter using JK-filpflop.
  6. What is race around condition? How it is avoided.
  7. Illustrate how a PLA can be used for combinational logic design with reference to the function F1(a b c)= ∑m(0,1,3,4), F2(a b c)= ∑m(1,2,3,4,5). Realise the same assuming that a 3*4*2 PLA is available.
  8. Design and explain the complete accumulator or 4-bit accumulator constructed with four stages.
  9. Explain the bus organization using processor registers and ALU.
  10. Draw the block diagram of control logic and explain.

 

 

  1. The state diagram of a sequential machine is shown below. Write down the corresponding state table.

 

  1. Design a shift register using 4-bit combinational logic shifter.
  2. Differentiate the hardwired control and microprogram control ans mention the advantages and disadvantages in each method.

Answer any 5 questions 5*10=50

  1. Simplify the following using tabulation method, F(WXYZ)= ∑m(1,2,3,5,9,12,14,15)+

∑d(4,8,11)

  1. Implement the switching functions

Z1=abde+abcde+bc+de, Z2=ace, Z3=bc+de+cde+bd

Z4=ace+ce using a 5*8*4 PLA.

  1. Convert the given circuit to one using only NOR gates and find the expression.

  1. Disscuss a decade counter its working principle.
  2. Explain system configuration in detail.
  3. Design an integrated circuit memory using 2*4 decoder.
  4. Define synchronous counters and design 4-bit up-down binary counter.
  5. Classify the sequential circuits and explain with example write the difference between them.

 

 

 

 


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