University of Mumbai 2003 B.E Electronics & Tele-Communication Engineering COMNICATION CIRCUITS - Question Paper

COMMUNICATION CIRCUITS (DEC. 2003)
N.B.:
(1) ques. Nos. one is compulsory.
. (2) Attempt any 4 out of remaining ques..

part I
1. ans any four:
(a) Which are the general features of audio amplifiers ? (5)

(b) An amplifier with a 10-dB noise figure and a power gain of 4-dB is cascaded with a 2nd amplifier which has a 10-dB noise figure and 10-dB power gain. elaborate the overall noise figure and power gain ? If these power gains are independent of frequency, what will be the total output noise power of the cascaded system in a three kHZ bandwidth ? The operating temperature is 290° K. (5)

(c) What is impedance matching ? explain the utility of reactive networks in impedance matching. (5)

(d) discuss the frequency synthesizer that uses a dual modulus prescalar. (5)

(e) define the four diode switching kind frequency mixer and derive the expression for its output voltage. (5)

(f) discuss the working of IC 1596 as balanced modulator. (5)

2. (a) discuss intermodulation distortion in detail. (5)

(b) define the noise which occur in active devices. (5)

(c) Derive the relation ranging from Z1 and Z2 for port three to be isolated from port four in the figure beneath. With the
relations so derived, show that maximum power transfer from ports two and four of the circuit, will outcome. (10)



3. (a) discuss detailed analysis of series RLC circuit. (6)

(b) Design a lossless coupling network that matches a load of (12 + j 5) ohm to a 40 ohm source impedance. (8)

(c) discuss the main features of audio amplifier IC LM380. (6)



4. (a) discuss audio amplifier IC LM380 as a photo amplifier. (6)
(b) Write short notes on : Passive and Active tone controls. (8)
(c) A parallel tuned circuit has L = two mH, C = 15 pf. obtain the unloaded 'Q' of the circuit. If a load of 50 K-ohm is
added in parallel, compute the loaded 'Q', resonant frequency and bandwidth. (6)

5. (a) discuss the basic operation of PLL, with a neat block diagram. (6)
(b) Derive the expression for transfer function of 2nd order PLL. (8)
(c) A PLL has a VCO with gain, k„ = 25 kHZ/V and fc = 50 kHZ. The amplifier gain is A = two and the phase
detector has a maximum output voltage swing of ± 0.7. obtain the lock range of the PLL.
presume the filter gain to be unity. (6)

part II
6. (a) discuss the subsequent PLL applications: (8)
i) Signal synchronizers and carrier recovery, ii) Amplitude demodulation.

(b) Which are the main properties of a VCO used in a PLL? (6)

(c) List the various kinds of digital phase detectors and discuss any 2 in detail. (6)

7. (a) Write short notes on (any three): (12)
i) Digital PLL of 1st order, iii) Automatic gain control.
ii) Step-up auto-transformer iv) Power transfer in Hybrid transformers.

(b) Derive the expression for gain-BW product (GBW) of a high-frequency amplifier using MOSFET. (8)

8. (a) define the neutralization and feedback techniques for wide banding of cascaded amplifiers. (8)

(b) discuss 'frequency synthesizer by phase lock' method and bring out its advantages as compared
with that of direct frequency synthesizer. (8)

(c) Which are the methods of reducing the switching time of a frequency synthesizer ? (4)

9. (a) Design a direct digital frequency synthesizer to generate 15.8 x 106 Hz from
a one x 106 Hz reference oscillator. (8)

(b) Write short notes on: (any two) (8)
i) FET mixer. ii) Analog frequency synthesizer, iii) Transmission-line hybrid transformer.

Earning:   Approval pending.