Kurukshetra University 2007 B.Tech Electronics and Communications Engineering Digital electronics - Question Paper
DIGITAL ELECTRONICS
2007
Hull No
Digiuil Eleuiroalii |
IM ajfimum Mflrks ; 1nD
limit: Threeltmursj
Note AttTMjrt FIVR quott inm \n alL iciccimit n <1E
qocsiiifn froji) rach pod. KBcln|uc?TJon cjirritfttquNl marks.
PAKT-I
], Perform iTic indltulcd operrtlioii :
{i) DrtEttnlne the rietrmul valur tr(0LJ25\.
(it) Discuss iht dcPficumpk'nictiling pmjicrry of cuceiH-.l code, (in) Add I he fc>ll{iwjii IKP mnrtStri
ftlimNi -hcmuioon
(vj Nnl>Lrjii;i 94r - st:l4,
(vi> i.'an*rt FSODloBmvy,
(v i i) 11 ividc Oil 1001 fHJ by 000 JI (HJI unJng a in magi itudc arilhnitfJi; (viit)IMriiricr ifce folhroing binary fSiynscd \umhcr):
000011UQ - M' I1 |0L 11 .
(a) Find 3LJcumplcmcnl of 10111000.
{l) Mulflply the btltpxy numbers: 101 * ll|liL+ 10*1-2
J. (i] 1 QM i! ([(kWiih find i m Ju imnlli (Over fftf rfi e fd>11 uwi n g function ;-
r<AFBHCLU>= lm((l, th 2, 4h 5t 7n 8, Hi) * d (3H 11,
IJnm rhe circuit And diieuij Their chnrwctertallC tables for [lie Phi I Ihiv-'ina gates:
(i > OK gbte_ u&injj NANI) gnteji pnly.
<b) 3, <a>
01) bX"OR and EX-NOR <ttM*wiingl Hsn unty. 5 FART-II
A c)mbbHi>ial circuit h defined by the fallowing ihrw
I rOffL :
Fii'N + YT XY + KY h, - XY+XYZ
[>S.U|n the effcuil wfth ft iJLKtcr und cuttfliol L0
Pnu 4 type diagram of2'tmc m 4-line dtnc*!**/dcfuittiptocr
(V>
(*'
J. ,00
u]ih| N()R fairs tmlv j
rfcjflfcH i J-Bil Binary toOniy Ok*e Converter 5
Qtiw u 4-Rir paoHeiii kcnul-aui dtifl rc.u; 1 fctur Dran ihe
limluj diagram for Gutp 11 ll. 10
hj&i [Jm ktiiic diagram shown ht;[nwh design Lliu circuit mirt
i*
10
Vr'hllt Itfl&ic difference 111 NfltllfJHtd and nnn *11 Uf fUdl Itrgig hiiiHMflh ? Dc.Hf.rite []l( upenuinn of ii tas i u ftCl.and pruvt 1.11n1 Iht trrtfisistnrx In fcX'L urt never driven Lo nturation rcflinn. 10
3. 1") <b>
57fi4(E;ty
Whfll ore tlM iinulnliniti of DTL tiver Tl"L ? j
Modify TTTlr'cUcnir to UK in high IKJIse tf nvif nMlKtll 5
C"ont'
(a) W.rhfl.L is LnrcrJ-'ac ill* ? Discuss t lie i ntcrfaic i n & between C MOS and TT1 - iy
(h) Discuss the advances* mid *Jiof CMOS ovci TTL. ,1
ft) Explain HiCjOpeL'atitui Ld'aCMOS NtJKyiie. j
PAR I -IV
(fl) WfLES a sllOft nuLeim each nf fhc ft?J Lo*\-i it<i 1
(i) Weighted Resistor IJAC
(ii) Dual Sldpc ALIt\ |fl (t>) Explain rhc.pccifigafiojis far ADC unJ D AC which must be
satisfied. |o
(uj Design a HCU to buce&S -3 Cude c<mverter using a
(ij lJKOM (li>PL'A (iii) PAL. 15
(h) Discuss [lie ardiiLecLuri: f<ir a lJJ.|l. tjjve SOJlle nuilablc examples. 5
Attachment: |
Earning: Approval pending. |