Kurukshetra University 2008-4th Sem B.Tech ester. - exam paper

BT-4/J08
Microprocessor and Interfacing
Paper :ECE-216 E
choice II
Time--Three hours][Maximum marks--100
Note:-- Attempt 5 ques. in all selecting at lowest 1 ques. from every unit.

Unit 1

ques. 1:- discuss different kinds of interrupts in detail in 8085 microprocessor and define the interrupt process for them in detail and elaborate the major problems in implementing the interrupts? 8+7+5=20.

ques. 2:- a) discuss subsequent instructions in detail with the help of examples:--
(i)RAR
(ii)CPI data
(iii) CALL addr (Label)
(iv)SPHL
(v)XRI data 5x2.

b) define sequence of events that occurs when 8085 MPU reads from memory with the kelp of timing diagram. 10.


UNIT 2

ques. 3. (a) discuss the subsequent addressing modes with examples:--
i. Base Index Addressing Mode.
ii. Register Index Addressing Mode.
iii. Intra-segment indirect mode.
iv. Implicit Addressing mode. 4X3=12

b)construct the machine codes and provide the addressing mode for the subsequent instructions:-
i) ADD C17D[BX][DI], DX; opcode for ADD=000000
ii.MOV AX,[BX]; opcode for MOV =100010. 4X2=8


ques. 4.(a) discuss the subsequent instructions with examples:-
i. AAA
ii. XLAT
iii. RCL
iv. RET 4X3=12

b)Write an assembly language program to obtain any power of any number. 8.

UNIT--3


ques. five a) discuss the features of mode '1' and node '2' of 8255 in detail. 6+6=12

b) interface 16-bit 8255 ports with 8086. address of port 'a' is FOH. draw interface circuitry. 8

ques. 6. a) interface digital to analog converter of R-2R ladder kind with an 8086 CPU running at 5MHz and write and an assembly language program to generate a sawtooth waveform of period one ms with V equal to five volt. take port 'a' as an output port. 12.

b) discuss operation of successive approximation kind analog to digital converter with the help of circuitry. 8.


UNIT--4

ques. seven a) discuss the architecture and register organization of DMA controller (8237) in detail with diagram. 15

b) discuss the subsequent modes of DMA operation with 8237 in detail:--
i. demand transfer mode
ii. cascade mode. 5.


ques. eight a) provide the architecture and signal description of programmable interval timer chip 8253 using diagram . 12.

b) provide pin configuration of 8259 i.e priority interrupt controller. 8.

Earning:   Approval pending.