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SRM University 2007 B.Tech Electronics and Communications Engineering BANK of Introduction to VLSI Design - Question Paper

Wednesday, 30 January 2013 11:25Web
ii) In CMOS design metal wire can cross the demarcation line.
iii) In CMOS design polysilicon can cross the demarcation line.
39. Draw the stick diagram and circuit diagram of a NMOS inverter?
40. Draw the stick diagram and circuit diagram of a CMOS inverter?
41. Draw the stick diagram and circuit diagram of a NMOS two input NAND gate?
42. Draw the stick diagram and circuit diagram of a CMOS two input NAND gate?
43. Draw the stick diagram and circuit diagram of a NMOS two input NOR gate?
44. Draw the stick diagram and circuit diagram of a CMOS two input NOR gate?
45. What is lambda based design rule?
46. What are the approaches in making contacts ranging from polysilicon and diffusion?
47. What is double metal MOS Process rule?
48. List the indicators that characterize the microelectronics technology?
49. Name the kinds of scaling models? List the factors that limits the scaling of MOS circuits?
50. Explain the subsequent briefly….
a) Threshold voltage b) Sub threshold voltage
c) Hot carrier effect d) Long and short channel effects.

PART B
1. Explain in details the enhancement mode and depletion mode transistor action with neat diagram.
2. With neat diagram, discuss in detail the NMOS fabrication process?
3. With neat diagrams, discuss in detail the p-well CMOS fabrication process?
4. With neat diagram, discuss in detail the n-well CMOS fabrication process?
5. With a suitable flow diagram, discuss in detail the Berkely n-well fabrication process?
6. Derive the Drain to source current Ids versus voltage Vds relationship for a NMOS transistor when the transistor is in
i) Non-saturated region. ii) Saturated region.
7. Derive the formula for transconductance gm and output conductance gds of a MOS transistor?
8. Derive the transfer characteristics of NMOS inverter .Also explain about the MOS transistor figure of merit W0.
9. Derive the pull-up to pull-down ratio for an NMOS inverter driven by a different NMOS inverter?
10. Derive the pull-up to pull-down ratio for an NMOS inverter driven through 1 or more pass transistors?
11. Draw the stick diagram, circuit diagram, layout diagram of
i) NMOS inverter ii) CMOS inverter
12. Draw the circuit diagram, stick diagram, layout diagram of
a) NMOS two input NAND gate. b) NMOS two input NOR gate.
13. Draw the circuit diagram, stick diagram, layout diagram of
a) CMOS two input NAND gate. b) CMOS two input NOR gate.



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