SRM University 2007 B.Tech Electronics and Communications Engineering BANK of Introduction to VLSI Design - Question Paper
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S.R.M. Institute of Science & Technology
School of Electronics & Communication Engineering
ques. BANK
Subject Code : EC308
Subject Name : Introduction to VLSI Design
Year & Sem : III Year , sixth Sem
UNIT I & II
PART – A
1. Draw the structure of NMOS enhancement mode transistor?
2. Draw the structure of NMOS depletion mode transistor?
3. Draw the structure of PMOS enhancement mode transistor?
4. Draw the structure of PMOS depletion mode transistor?
5. Why PMOS transistors are slower than NMOS transistors?
6. For the subsequent condition, state whether the channel is established or not, whether the current flows ranging from source and drain or not (for enhancement mode transistor). discuss briefly.
i) Vgs>Vt; ii) Vds=0v.
7. What is the state of a enhancement mode transistor for the subsequent condition?
Vgs>Vt ; Vds
Vgs>Vt ; Vds>Vgs-Vt
9. What is photoresist coating and masking?
10. What is need of SiO2 layer in MOS fabrication process?
11. State the kinds of CMOS fabrication process?
12. What is the use of P+ (Positive and Negative) mask in fabrication of CMOS transistors?
13. What is Twin tub process?
14. Draw the Twin tub structure.
15. Draw the structure of CMOS P-well inverter.
16. Draw the structure of CMOS n-well inverter.
17. What is the advantage of CMOS technology over NMOS technology?
18. Compare CMOS and bipolar technology?
19. Write the formula for Ids of a NMOS transistor when the transistor is in saturated region?
20. Write the formula for Ids of a NMOS transistor when the transistor is in non saturated region?
21. Draw the Vds vs Ids characteristics for
i) Depletion mode device. ii) Enhancement mode device.
22. Write the formula for threshold voltage Vt of a MOS transistor?
23. What is body effect?
24. Define transconductance of a MOS transistor?
25. What is the relationship ranging from switching speed and transconductance of a MOS transistor?
26. What is pass transistor?
27. What is pull up and pull down transistor?
28. Draw the transfer characteristics of NMOS inverter?
29. What is the pull-up to pull-down ratio of an inverter driven 1 or more pass transistors?
30. What is the pull-up to pull-down ratio of an inverter driven directly by a different inverter?
31. Name the option forms of pull-up?
32. What is latch-up is CMOS circuits?
33. Draw the latch-up current vs voltage characteristics of a CMOS transistor?
34. What is the use of design rules?
35. What is stick diagram?
36. Draw the stick diagram of n-type depletion mode and enhance mode transistors.
37. What is demarcation line?
38. State whether the subsequent statements are actual or false.
i) In CMOS design diffusion can cross the demarcation line.
| Earning: Approval pending. |
