Jawaharlal Nehru Technological University Hyderabad 2012-1st Sem M.C.A Computer Organization, s, (Code No: MC116) - Question Paper
Regulation R06
subject:CO
ques. Paper attached here
Code No: MC116
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD MCA I Semester Examinations, February 2012 COMPUTER ORGANIZATION Time: 3hours Max. Marks: 60
Answer any five questions All questions carry equal marks
1. a) Simplify the function f (w, x, y, z) = s(0,1,2,4,6,8,10,12) in sum-of-products and
products-of-sum using k-map method.
b) Design a full-adder circuit and realize using NAND gates.
2. a) Write the range of signed, unsigned for a 32-bit representation.
b) Simplify the expression f (x, y, z) = xyz + xyz'+ x' y' z + x' yz' to minimum number of literals.
c) Realize 4*16 decoder using 3*8 decoders.
3. a) Write differences between direct, associative and set associative mapping method.
b) Explain the write-back and write-through policies in caches.
4. a) Explain any four addressing modes with illustration.
b) Write the given expression F = (a+b) * (c+d * * f )/e in one, two and three address instruction formats.
5. a) Write the arithmetic, logical and shift instructions in 8086.
b) List the flags in 8086 architecture and write their usage.
6. a) What is an interrupt? How interrupts are addressed in 8086?
b) Write an assembly language program to add two 32-bit numbers.
7. a) Differentiate between Hardwired and micro programmed control unit.
b) Design a 4-bit binary counter using T-flipflop.
8. a) Explain the data transfer mechanism in DMA with diagram.
b) How daisy chaining mechanism is implemented to resolve interrupts?
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