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# SRM University 2007 B.Tech Information Technology IT204 / CS202 - OPERATING SYSTEMS - Question Paper

Wednesday, 30 January 2013 08:45Web
22. discuss LRU page replacement algorithm.
23. discuss FIFO page replacement algorithm
24. Consider the subsequent page reference string:
1,2,3,4,2,1,5,6,2,1,2,3,7,6
How many page fault would occur for LRU page replacement algorithm assuming three frames?
25. Consider the subsequent page reference string:
1,2,3,4,2,1,5,6,2,1,2,3,7,6,3,2,1
How many page faults would occur for FIFO page replacement algorithm assuming four frames?
26. What is Belady’s anomaly?Give an example.
27. discuss thrashing?
28. Why is the principle of locality crucial to the use of virtual memory?
29. What elements are typically obtained in page table entry? Briefly describe every element.
30. What is the purpose of a translation lookaside buffer?
31. What is the relationship ranging from FIFO and clock page replacement algorithm?
32. What is accomplished by page buffering?
33. What is the difference ranging from resident set and working set?
34. What is the difference ranging from demand cleaning and precleaning?
35. What is compaction?
36. What is a buddy system?
PART B

1.With the help diagrams and tables, discuss dynamic partitioning memory management techniques.What are the advantages and disadvantages of this scheme?

2.What is meant by relocation?With the help diagrams, clearly discuss the need for relocation and
its implementation.Give the details of hardware support.

3.a)Explain the buddy system in detail.
b)Consider a buddy system in which a particular block under the current allocation has an address of 011011110000.
i.If the block size is 4, what is the binary address of its buddy?
ii.If the block size is 16, what is the binary address of its buddy?

4.a)Explain simple paging technique, giving details of page table and address translation.
b)Consider the 2 dimensional array A:
int A[][] = new int[100][100];
where A[0][0] is stored at location 200, in a paged memory system with pages of size 200.A small process resides in page 0(locations 0 to 199) for manipulating the A matrix;thus, every instruction fetch will be from page 0.
For three page frames, how many page faults are generated by the subsequent array initialization loops, using LRU replacement, and assuming page frame has the process in it, and the other 2 are initially empty:

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