SRM University 2007 B.Tech Electronics and Communications Engineering Bank :: Digital Systems - Question Paper

7. Define Current Sourcing.
8. State the advantage of a totem-pole output.
9. State the disadvantage of a totem-pole output.
10. How many P-Channel MOSFET are in a CMOS inverter?
11. What factors determine CMOS fan out?
12. What is an open collector output TTL? Where it is used?
13. What is meant by wired operation?
14. Mention the name of the logic family which come under the non-saturated logic system.
15. Mention the advantages of Schottky transistor.
16. Briefly discuss about tristate devices.
17. Mention the important characteristics of TTL family.
18. Mention the 3 various kinds of output configuration in any TTL gate.
19. Mention the important characteristics of ECL logic family.
20. Mention the difference ranging from current sinking and current sourcing.
21. Draw the three input RTL NOR gate circuit diagram.
22. The 74ALS20 data sheet provide the subsequent values IOH (max )= 0.4mA, IOL (max) = 8mA, IIH (max) = 20?A and IIL (Max) = 0.1mA. Determine how many 74ALS 20 NAND gates can be driven by the output of the above-mentioned gate.

23. Why shouldn’t totem-pole outputs be tied together?
24. How do open-collector outputs differ from totem-pole outputs?
25. Draw the N-MOS inverter circuit diagram.
26. Draw the circuit diagram of HTL logic gate.

PART-B
1. Draw the circuit of ECL NOR gate and discuss its operation.
2. Draw the circuit of a TTL NAND gate and discuss its operation.
3. Draw the TTL NAND gate with open collector output and discuss its operation.
4. a) Compare the Characteristics of ECL, TTL Ics.
b) Compare ECL and MOS logic family characteristics.
c) Compare ECL and CMOS Ics.

5. Draw MOS Inverter Circuit and discuss its function.
6. Draw TTL NOR gate and discuss its operation.
7. Discuss about the subsequent parameters
a) Fan out
b) Propagation Delay
c) Open Collector output
d) Noise Margin
e) Power dissipation
8. a) Draw the circuit diagram of three Input RTL NOR gate
b) Draw the circuit diagram of two input DTL NAND gate and discuss its operation.
9. Draw the circuit diagram of (a) CMOS Inverter (b) CMOS NAND Gate and discuss.

UNIT - III
Part – A
1. What is a combinational circuit?
2. Write the truth table of a Half-subtractor.
3. Write the truth table of a Half-Adder
4. Draw the full adder circuit using 2 half adder.
5. What is a multiplexer?
6. Draw a four to one MUX circuit.

Earning:   Approval pending.