SRM University 2007 B.Tech Electronics and Communications Engineering BANK : Microprocessor and Interfacing - Question Paper

55. What are the control signals necessary in the memory mapped I/O?
56. Explain why a latch is used for an output port but a tri state buffer can be used for an input port.
57. What are tri-state devices and why are they necessary in a bus oriented system?
58. If the input to an octal buffer is 4FH and the enable lines 1G and 2G are low, what is the output of the buffer?
59. In a bidirectional buffer, if enable and DIR signal are low, specify the direction of data flow.


60. Specify the output line that goes low if input to three to eight decoder 74LS138 is
A7 A6 A5 A4 A3 A2 A1 A0
1 one one one 0 one one 1
61. What is transparent latch? Why is it necessary to use a latch with output devices such as
LEDs?
62. Why AD0-AD7 lines are multiplexed?
63. What is the use of ALE signal?

PART -B
1. Explain the instructions EI, DI, RST, RIM, SIM and their functions in the 8085 interrupt process.
2. Design and implement the subsequent interrupts
a. RST 4
b. RST 2
c. RST 7
3. Explain how to connect multiple interrupts with the INTR line using priority encoder and also list out the disadvantage of using priority encoder.
4. Explain the interrupt structure of 8085 with a neat sketch depicting vectored memory locations and also define how the 8085 performs interrupt handling.
5. Draw the 8085 timing diagram for
a. Interrupt acknowledge machine cycle.
b. Execution of RST.
6. Explain the interrupt kinds available in 8086 with their priority levels and specify the action when an interrupt is executed and also write short notes on software interrupts supported.
7. Draw the functional pin diagram of 8279 and discuss the function of various pins.
8. Draw and discuss the internal block diagram of 8279.
9. Give the schematic arrangement using 8259A PICs to serve 15 interrupts. eight interrupts are level triggered and seven are edge triggered. Use rotating priority and non specific EOI command. Write the initializing program
10. Explain the interfacing of stand alone 8259A with 8085 with a neat sketch.
11. Explain the interfacing of stand alone 8259A with 8086 with a neat sketch.
12. Discuss the data formats of the initialization and operation command words supported by 8259a.
13. List out the sequence of events when 1 or more interrupt request lines go high in 8259A. and also discuss the initialization process of 8259A.
14. Explain the improper command words and initialization sequence to program 8259A in the subsequent priority modes

Earning:   Approval pending.