SRM University 2007 B.Tech Electronics and Communications Engineering BANK : Microprocessor and Interfacing - Question Paper

51. Define opcode and operand?
52. What is opcode fetch cycle?
53. What operation is performed during 1st T-state of every machine cycle?
54. When 8085 µP checks for an interrupt?
55. What is interrupt acknowledge cycle?
56. What is wait state? When 8085 µP will enter wait state?
57. What will be the status of the processor during the bus idle signal?
58. How many instructions are available in 8085?
59. What is the instruction format of 8085?
60. What is addressing?
61. What are the addressing modes available in 8085?
62. How the instruction set is classified in 8085?
63. Which group of instructions affects the flags?
64. What are the arithmetic instructions that do not affect flags?
65. What is DAA?
66. What is DAD?
67. List the different instructions that can be used to clear accumulator.
68. What is the likeness and difference ranging from subtract and compare instruction?
69. What is PSW?
70. What is the difference ranging from CALL and JUMP instructions?
71. What is the difference ranging from conditional and unconditional branching instructions?
72. Compare the subsequent pair of instructions
a. MVI A,00 and XRA
b. SUB B and AMP B
c. JMP 5100 and PCHL
d. XTHL and SPHL
e. LDA 4500 and LHLD 4500
f. RRC and RAR
73. How many times will the 2 JNZ instructions be executed in the subsequent sequence? What will be the contents of H and L when program control reaches to HLT instruction?
LXI H, 0503
LOOP: DCR L
JNZ LOOP
DCR H
JNZ LOOP
HLT
74. Write a note on software delays.
75. What is subroutine? How is it useful?
76. The 1st 4 instructions of a typical subroutine are:
PUSH PSW
PUSH H
PUSH B
PUSH D
What will be the last 5 instructions of the subroutine? discuss.
77. What are the instructions related to interrupts? elaborate the functions performed by them?
78. What is primary purpose of 8085 H-L pair with respect to external memory? List 2 of ots main functions.
79. What is meant by inherent mode of addressing?
80. Identify the addressing modes of the subsequent instructions.
a. MOV A,M
b. RAR
c. STAX D
d. LDA 4100
81. What function is performed by every of the subsequent 8085 instructions.
a. XOR A
b. MOV D,D
c. DAD H
82. Assume register pair BC contains 7F0216. For the subsequent 8085 ALP, determine carry, zero, parity and sign flags after execution of the MVI A, 05 instruction.
ORG 4100
LXI SP, 2050
PUSH B
MVI A, 02
ADI 03
POP PSW
MVI A, 05
HLT

Earning:   Approval pending.