SRM University 2007 B.Tech Information Technology IT201 MICROPROCESSOR AND ITS APPLICATIONS - Question Paper

1. Draw and explain the internal block diagram of 8086. (10)
2. Draw the register organization 8086 and discuss typical applications of every register. (10)
3. Draw and explain the learn and write cycle timing diagram of 8086 in maximum mode. (10)
4. Draw and explain a typical maximum mode 8086 system? What is the use of the controller in maximum mode. (10)
5. Explain the various kind of addressing modes in 8086 with examples. (10)
6. Write an ALP to print a message ‘The Printer in Busy’. On to Dot matrix Printer. (5)
7. Write an ALP to display system date. (10)
8. Write an ALP to sort the numbers in ascending /decending order. (10)
9. Write an ALP to generate the delay of 100ms using an 8086 system runs on 10 MHz frequency. (10)

UNIT II

PART – A

1. Explain the control word format of 8255 in I/O mode?
2. Explain the control word format of 8255 in BSR mode?
3. Write down the general procedure of static memory interfacing with 8086?
4. How many address lines will require for interfacing the chip 4kx8 & 16kx8?
5. How refresh cycle is various from memory learn cycle?
6. A typical 4k bit DRAM has internally organizes in 64 rows & 64 columns. The refresh time interval is 4ms. compute the refresh frequency.
7. Bring out the differences ranging from static & dynamic RAM.
8. Explain the interfacing methods of I/O devices in detail.
9. Differentiate I/O mapped and Memory mapped I/O.
10. List out the salient features of BSR mode in 8255.
11. What is CWR?
12. How to address learn and write cycle of any 1 of the 4 registers in 8255 i.e., three port and CWR?
13. What are the salient features of basic I/O mode?
14. What are the salient features of strobed I/O mode?
15. What are the salient features of strobed bidirectional I/O mode?
16. List out a few of the techniques used in analog to digital converters.
17. Differentiate ADC & DAC.
18. Interface a 8086 processor with mode 0 (basic I/O mode) of 8255. Initialize port A as input port, port B as output port and port C as output port. Port A address should be 0750H. Write down the control word register format & control word for this issue.








PART – B

1. Design an interface ranging from 8086 CPU and 2 chips of 16kx8 EPROM and 2
chips of 32k x eight RAM. choose the starting address of RAM suitably. The RAM address must begin at 00000H. (10)
2. Interface a 2 4k x eight EPROMS and 2 4k x eight RAM chips with 8086. choose

Earning:   Approval pending.