Jawaharlal Nehru Technological University Hyderabad 2010-2nd Sem M.Tech Computer Science & Engineering Regular s tember, ADVANCED COMPUTER ARCHITECTURE (COMPUTER SCIENCE & ENGINEERING

Code No: D5803
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M.Tech II - Semester Regular exams September, 2010
ADVANCED COMPUTER ARCHITECTURE
(COMPUTER SCIENCE & ENGINEERING)
Time: 3hours Max. Marks: 60
ans any 5 ques.
All ques. carry equal marks
- - -

1.a) describe performance. define how the 5 levels of programs are used in
evaluating performance?
b) How Amdahl's legal regulations is useful for measurement of improved performance of
computer systems?

2.a) discuss different operations in the instruction set.
b) Write notes on addressing modes for control flow instructions.

3.a) elaborate the limitations of dynamically scheduled pipelines and how
hardware based speculation can address these limitations?
b) Briefly discuss basic VLIW approach.

4.a) Write short notes on RLSC.
b) provide a brief account on Instruction-level parallelism.

5.a) What is meant by dynamic scheduling? discuss.
b) discuss the cost and performance of a cluster for transaction processing.

6. discuss multiprocessor cache coherence.

7. discuss Designing of clusters with example.

8. Write short notes on the subsequent
(a) Practical problems in interconnecting networks.
(b) Protection of virtual memory.

Earning:   Approval pending.