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Jawaharlal Nehru Technological University Hyderabad 2007 M.Tech VLSI system design ANALOG IC DESIGN - Question Paper

Sunday, 30 June 2013 05:40Web

Code No: 54121/MT
M.Tech. I-Semester Examinations, February -2007.
ANALOG IC DESIGN
(VLSI System Design)
Time: three hours Max. Marks: 60
ans any 5 ques.
All ques. carry equal marks
- - -
1.a) Derive an expression for the –3dB frequency of a bipolar CE
amplifier.
b) In a CMOS source follower circuit all transistors have
W/L = 100µm,/1.6µm µnCox = 90µA/V2, µpCox = 30µA/V2,
Ibias = 100µA, rn = 0.5V1/2, vds-n(
?)
= 8000L (µm)/ID(mA). Determine
the gain of the stage.

2.a) Draw the circuit of CMOS current mirror and discuss its working
principle.
b) discuss why source/emitter follower circuits exhibits large
amounts of overshoot and ringing.

3.a) elaborate the ways of improving slew rate of 2-stage CMOS opamp?
And derive an expression for slew rate of CMOS opamp.
b) discuss about different OPAMP compensation techniques.

4.a) What is CMFB circuit? elaborate different methods of designing
CMFB circuits? And compare them.
b) discuss the principle of continuous time CMFB circuit.

5.a) Briefly discuss about different performance parameters of sample-
and-hold circuit.
b) Draw the circuit of switched capacitor circuit and discuss its
principle.

6.a) Compare and contrast CMOS and BICMOS sample and hold
circuits and their performance.
b) describe the terms as referred to converters:
i) offset and gain fault
ii) INL fault
iii) DNL fault
iv) Sampling time uncertainty.

7.a) Prove that the sinusoidal signal has 1.76dB more power than a
random signal which is uniformly distributed.
b) discuss the principle of operation of dual slope A/D converter.

8.a) elaborate the advantages of 1-bit D/A converters?
b) Derive the component values of first order continuous time filter.



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