Jawaharlal Nehru Technological University Hyderabad 2011-1st Sem M.Tech VLSI system design Code No: C5705 s ch/il- HARDWARE SOFTWARE CO-DESIGN - Question Paper
Sunday, 30 June 2013 04:55Web
1.a) Draw and discuss the Register Transfer level Block diagram of Design Model.
b) With block diagram discuss Risc with hardwired control. [12]
2.a) Briefly discuss performance estimation.
b) discuss various component specialization techniques. [12]
3.a) discuss about Aptix Prototyping System.
b) discuss about Architecture of 8051 Micro Controller. [12]
4.a) discuss Commercial support of embedded processors.
b) Are traditional Compilation techniques enough? discuss. [12]
5.a) Briefly discuss about Compiler validation.
b) discuss about The Co-design Computational model. [12]
6.a) discuss about Design verification.
b) Compare Blocking Operations and Non-blocking Operations. [12]
7.a) Briefly discuss about Synthesis Intermediate forms.
b) discuss about Co-simulation Models. [12]
8. Write short notes on any 2 of the following:
i) The Cosyma System
ii) Interface Verification
iii) System Communication infrastructure. [12]
Earning: Approval pending. |