Jawaharlal Nehru Technological University Hyderabad 2006-2nd Sem B.E Computer Science COMPUTER ORGANISATION II B.TechRegular s, / set 4 - Question Paper

Code No: RR220501 Set No. 4
II B.Tech II Semester Regular Examinations, Apr/May 2006
COMPUTER ORGANIZATION
(Common to Computer Science & Engineering, info Technology,
Computer Science & Systems Engineering and Electronics & Computer
Engineering)
Time: three hours Max Marks: 80
ans any 5 ques.
All ques. carry equal marks
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1. (a) What is instruction Cycle ?
(b) what are the characteristics of a hypothetical machine
(c) What do you mean by hardwired program?
[6+6+4]
2. (a) What do you mean by appropriate storage of floating point numbers.
discuss with an example.
(b) What is the range of real numbers represented in normalized floating
point representation in a six digit register.
[8+8]
3. explain about different Pentium operation kinds with examples. [16]
4. (a) Differentiate ranging from large register file versus cache.
(b) explain how compiler based register optimization is done.
(c) discuss different characteristics of decreased instruction set architectures.
[6+6+4]
5. (a) Differentiate ranging from single versus twolevel
caches.
(b) what are on Pentium Cache Organization.
[8+8]
6. explain the major functions and requirements for an I/O module. [16]
7. (a) Differentiate ranging from micro programmed and hard wired control units
with merits and demerits of every.
(b) explain about the design considerations of micro instruction
sequencing technique. [8+8]
8. (a) Differentiate ranging from highlevel
and lowlevel
parallelism
(b) explain about Flynn’s classification of parallel processor systems.
(c) discuss various MIMD interconnection topologies. [5+6+5]
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4 of

Earning:   Approval pending.