DOEACC Society 2006 DOEACC B Level - B1.4 Computer Organisation ( ) - Question Paper

A) Decrement the content of N
B) Decrement the data addressed by N
C) Convert signed decimal number to binary
D) None of the above
B1.4-R3 Page two of five July, 2006
2. every statement beneath is either actual or FALSE. select the most improper one
and ENTER in the “tear-off” sheet attached to the ques. paper, subsequent
instructions therein. (1 x 10)
2.1 A register is a group of NAND gates with every gate capable of storing 1 bit
information.
2.2 Octal equivalence of the hexadecimal number AF63 is 127543.
2.3 A register transfer language uses symbolic notation to define the micro operation.
2.4 SNA means skip next arithmetic instruction.
2.5 In implied mode, the operands are specified implicitly in the definition of the instruction.
2.6 Fixed-point numbers represent only integers.
2.7 Booths algorithm provide a procedure for dividing binary integers in signed 2’s complement
representation.
2.8 A polling procedure is used to identify the highest priority source by software means.
2.9 Virtual memory provides higher capacity memory.
2.10 A compiler is a simple program than an assembler.
3. Match words and phrases in column X with the nearest related meaning/
word(s)/phrase(s) in column Y. Enter your selection in the “tear-off” ans sheet
attached to the ques. paper, subsequent instructions therein. (1 x 10)
X Y
3.1 ROM A. asynchronous communication interface
3.2 Gray code B. location counter
3.3 ISZ C. mask programming
3.4 polish notation D. binary coded digit
3.5 BCD E. increment and skip if zero
3.6 UART F. places the operator before the operands
3.7 magnetic tape G. reflected code
3.8 strobe control H. memory reference instruction
3.9 MRI I. method of asynchronous data transfer
3.10 LC J. binary coded decimal
K. move register immediate
L. load counter
M. access is sequential
N. interrupt and store zero
O. places the operator after the operands
B1.4-R3 Page three of five July, 2006
4. every statement beneath has a blank space to fit 1 of the word(s) or phrase(s) in
the list beneath. Enter your option in the “tear-off” ans sheet attached to the
ques. paper, subsequent instructions therein. (1 x 10)
A. magnetic tape B. collision C. algorithm
D. control E. counter F. shift register
G. mantissa H. decimal point I. stack
J. interrupts K. status L. bootstrap
M. pseudo instruction N. mnemonic O. absolute
P. flowchart Q. register reference R. memory reference
S. micro operation
4.1 A register that goes through a predetermined sequence of states upon the application of
input pulses is called as a(n) ______________.
4.2 Floating point representation contains ________and exponent.
4.3 A(n) _____ is an elementary operation performed with data stored in registers.
4.4 __________ instructions use 16 bits to specify an operation.
4.5 _______ is a storage device that stores info in such a manner that the item
stored last is the 1st item retrieved.
4.6 _______ occurs when an instruction cannot proceed because previous instructions did
not complete certain operations.
4.7 The solution to any issue that is said by a finite number of well-defined procedural
steps is called a(n) __________.
4.8 A(n) _________ command is issued to activate the peripherals to inform it what to do.
4.9 A(n) ______ loader is stored in the ROM portion of main memory.
4.10 A(n) _______ is not a machine instruction but rather an instruction to the assembler
giving info about a few phase of the translation.
B1.4-R3 Page four of five July, 2006
PART TWO
(Answer any 4 questions)
5.
a) Draw the flowchart of Booth algorithm for multiplication of signed 2’s complement
numbers and discuss it with an example.
b) Represent the subsequent decimal numbers in a six bit two’s complement format.
i) +14
ii) –20
c) Perform subtraction with the subsequent unsigned binary numbers by taking the two’s
complement of the subtrahend. 11010 – 01101.
(10+2+3)
6.
a) Draw and discuss a four bit adder–subtractor circuit.
b) discuss the different registers and their functions used in basic computer.
(6+9)
7.
a) discuss the various instruction formats used in computers.
b) Draw and discuss the working of a floating- point adder pipeline.
c) define the various shift operations.
(5+5+5)
8.
a) With a block diagram of a DMA controller discuss its role in data transfer.
b) By converting an SR Flip Flop into a JK Flip Flop, discuss the basic constructional
difference ranging from them.
(10+5)
9.
a) discuss the different kinds of mapping procedures used by cache memory.
b) Implement the function F(a,b,c,e) = S(1,3,7,9,15) using a decoder with 3
inputs a, b, c and eight active low outputs tagged 0 through seven together with an
active low enable input EN’. Use as few NAND gates as possible.
(10+5)
B1.4-R3 Page five of five July, 2006

Earning:   Approval pending.