DOEACC Society 2006 DOEACC B Level - B1.4 Computer Organisation ( ) - Question Paper

B1.4-R3: COMPUTER ORGANIZATION
NOTE:
1. There are 2 PARTS in this Module/Paper. PART 1 contains FOUR
ques. and PART 2 contains 5 ques..
2. PART 1 is to be answered in the TEAR-OFF ans SHEET only, attached
to the ques. paper, as per the instructions contained therein. PART 1 is
NOT to be answered in the ans book.
3. Maximum time allotted for PART 1 is 1 HOUR. ans book for PART
TWO will be supplied at the table when the ans sheet for PART 1 is
returned. However, candidates, who complete PART 1 earlier than 1 hour,
can collect the ans book for PART 2 immediately after handing over the
ans sheet for PART ONE.
TOTAL TIME: three HOURS TOTAL MARKS: 100
(PART 1 – 40; PART 2 – 60)
PART ONE
(Answer all the questions)
1. every ques. beneath provide a multiple option of answers. select the most
improper 1 and enter in the “tear-off” ans sheet attached to the ques.
paper, subsequent instructions therein. (1 x 10)
1.1 A combinational circuit that converts binary info from n coded inputs to a
maximum of 2n unique outputs is called as
A) encoder
B) decoder
C) multiplexer
D) demultiplexer
1.2 Decimal equivalent of the binary number 101001.1011 is
A) 41.0875
B) 40.6875
C) 41.6875
D) 40.0875
1.3 An operation that complements bits in A where there are corresponding 1’s in B is called
as
A) selective set
B) selective clear
C) selective complement
D) none of the above
1.4 The instruction increment AC
A) operates on data stored in the AC register
B) operates on the data stored in memory location AC
C) does not require explicit data
D) is not a valid instruction
B1.4-R3 Page one of five July, 2006
1.5 Shift instructions are
A) Data manipulation instructions
B) Data transfer instructions
C) Program control instructions
D) All of the above
1.6 Parallel processing may occur
A) In the instruction stream
B) In the data stream
C) Both A) and B) above
D) None of the above
1.7 The half adder performs
A) Decimal addition operation for two decimal inputs
B) Binary addition operation for two binary inputs
C) Decimal addition operation for two binary inputs
D) Binary addition operation for two decimal inputs
1.8 Octal number system is
A) A positional system with weights 0 to 9
B) A positional system with weights 0 to 8
C) A positional system with weights 0 to 7
D) A non positional system with weights 0 to 7
1.9 Typical access time of DRAM is
A) 200ns
B) 20ns
C) 20 x 106ns
D) None of the above
1.10 The instruction DEC N informs the assembler to

Earning:   Approval pending.