DOEACC Society 2007 DOEACC A Level A4-R3 Computer Organization - Question Paper

B) 11, 8
C) 12, 16
D) 12, 12
A4-R3 Page three of five January, 2007
2. every statement beneath is either actual or FALSE. select the most improper one
and ENTER in the “tear-off” sheet attached to the ques. paper, subsequent
instructions therein. (1 x 10)
2.1 EBCDIC code uses seven bits to represent a character.
2.2 The speed imbalance ranging from memory access and CPU operations is decreased by
memory interleaving.
2.3 The idea of virtual memory is based on principal of locality of reference.
2.4 The XOR operator is distributive over AND operator.
2.5 In INX H instruction bus remains idle for 1 cycle.
2.6 Interrupt RST 5.5 is both level and edge sensitive.
2.7 In Boolean algebra Wx + yx + Wy can be decreased to Wx + yx .
2.8 A micro-programmed control unit is faster than a hard wired control unit.
2.9 Parallel printer does not use RS-232C interface.
2.10 An astable multivibrator can be used as a flip flop.
3. Match words and phrases in column X with the nearest related meaning/
word(s)/phrase(s) in column Y. Enter your selection in the “tear-off” ans sheet
attached to the ques. paper, subsequent instructions therein. (1 x 10)
X Y
3.1 In a Vectored interrupt A. PUSH PSW will be used
3.2 In order to save accumulator value
onto stack
B. Volatile memory
3.3 Parity bit is included for C. halts for a predetermined time
3.4 Magnetic Disk is not a D. and produces code for a different
machine
3.5 An index register is used for E. Address modification
3.6 Cross Assembler runs on one
machine
F. Instruction set size is kept less
3.7 On arrival of an interrupt, the CPU G. Master/slave JK-Flip-Flop
3.8 Racing issues do not exist H. JK Flip flop
3.9 Von Neumann architecture is not a I. the branch is assigned to a fixed
location in the memory
3.10 A typical characteristic of Risc
machine is
J. fault correction
K. MIMD architecture
L. ROM
M. RS Flip-flop
A4-R3 Page four of five January, 2007
4. every statement beneath has a blank space to fit 1 of the word(s) or phrase(s) in
the list beneath. Enter your option in the “tear-off” ans sheet attached to the
ques. paper, subsequent instructions therein. (1 x 10)
A. Access time B. Operating system C. Control store
D. Machine instruction E. Array F. Processor
G. Microinstruction H. Direct address mode I. Register transfer
language
J. Circular shift register K. Memory buffer register L. Carry look ahead adder
M. Decoder N. Multiplexer O. Encoder
4.1 The instruction of a micro programmed control unit is called as ________.
4.2 Vector processor can also be called as ________.
4.3 In ________ the effective address is equal to the address part of the instruction.
4.4 ________ is collection of programs that controls the operation of computer for the
purpose of obtaining an efficient performance.
4.5 ________ has the capability of stopping the computer.
4.6 A ring counter is a(n) ________.
4.7 The ________ anticipates the carry in advance.
4.8 The ________ is used for storing the data bits.
4.9 The time difference ranging from application of learn signal and availability of data on data
lines are called as ________.
4.10 A(n) ________ is a digital function that converts binary info from 1 coded form
to a different.
A4-R3 Page five of five January, 2007
PART TWO
(Answer any 4 questions)
5.
a) Consider a cache (M1) and main memory (M2) hierarchy with the subsequent
characteristics.
M1: 16 K words, 50 ns access time
M2: one M words, 400 ns access time
presume 8 word catch blocks and a set size of 256 words with set-associative
mapping
i) Show the mapping ranging from M2 and M1.
ii) compute the effective memory access time with a catch hit ratio of h=0.95.
b) Design a logic circuit that performs the operations of Exclusive – OR, Equivalence, NOR
and NAND. Use 2 selection variables. Show the logic diagram of 1 typical stage.
(8+7)
6.
a) Consider a 4 variable Boolean function:
F = S (0, 4, 6, 7, 8, 10, 11, 15),
Minimize this function using K map, and realize it using gates.
b) Why NAND gate is called a universal gate. Justify your ans.
c) Convert decimal number (215)10 into i) binary, ii) binary coded hexadecimal, iii) BCD,
and represent every converted number in the format of 12 bit register.
(5+4+6)
7.
a) What is the difference ranging from isolated I/O and memory mapped I/O. elaborate the
advantages and disadvantages of each?
b) A 36 bit-floating number has eight bits plus a sign bit for the exponent. The mantissa is
presumed to be a normalized fraction. Negative numbers in mantissa and exponent are
in signed magnitude representation. elaborate the largest and smallest positive
volumes that can be represented, excluding zero?
c) discuss character oriented protocol used in data transmission.
(5+6+4)
8.
a) Write a macro named ADD which takes 2 arguments and returns the summation of
these arguments. Call it in main program to perform the additions of:
i) 4, 8
ii) 7, 3
b) Write an assembly language program to convert a decimal number to binary number.
c) What is the use of addressing mode? Differentiate ranging from index and base index
addressing mode.
(6+4+5)
9.
a) With the help of suitable logic diagram discuss the functioning of 1 bit ALU which is
able to perform basic arithmetic and logic operations.
b) List any 5 data transfer instructions.
c) discuss the functioning of CD-ROM storage device.
(5+5+5)
A4-R3 Page six of five January, 2007

Earning:   Approval pending.