DOEACC Society 2007 Advanced Level Course In Computer Science A4-R3: COMPUTER ORGANIZATION - Question Paper

3. Maximum time allotted for PART 1 is 1 HOUR. ans book for PART 2 will be supplied at the table when the ans sheet for PART 1 is returned. However, candidates who complete PART 1 earlier than 1 hour, can collect the ans book for PART 2 immediately after handing over the ans sheet for PART ONE.
TOTAL TIME: three HOURS TOTAL MARKS: 100
(PART ONE-40; PART 2 – 60)

PART ONE
(Answer all the questions)

1. Each ques. beneath provide a multiple option of answers. select the most improper 1 and enter in the “tear-off” ans sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

1.1 A Toggle flip-flop can be constructed using a JK flip-flop by connecting the
A) toggle input to J and the inverted from of toggle input to K.
B) the toggle input to J
C) inverted form of toggle input to K.
D) None of the above

1.2 The number of choose input lines in an 8-to-1 multiplexer is
A) 1
B) 8
C) 256
D) None of the above

1.3 CARRY, in half adder, can be found using
A) EX - OR gate
B) AND gate
C) OR – gate
D) EX - NOR gate

1.4 Booth algorithm provide procedure for multiplying binary integers in
A) signed magnitude representation
B) unsigned representation
C) 2’s complement representation
D) None of the above











1.5 a memory device, in which a bit is stored as a charge across the stray capacitance
A) SRAM
B) EPROM
C) DRAM
D) bubble memory

1.6 Fetch operations are not needed in
A) Direct addressing
B) immediate addressing
C) indirect addressing
D) register addressing

1.7 A debugging tool is a program which
A) removes bugs from user program
B) removes viruses from the computer
C) helps the user obtain bugs in his program
D) displays the errors in a user program

1.8 A diamond-shaped box in a flow chard refers to
A) An assignment statement
B) printing of a file
C) an if – then – else decision
D) data input from a device

1.9 In the difference ranging from a COMPARE instruction and a SUBTRACT instruction is
A) COMPARE instruction does not set any flags
B) SUBTRACT instruction does not set any flags
C) COMPARE leaves the registers unchanged
D) COMPARE instruction does not require the ALU

1.10 In the IEEE 754 floating point representation standard, the base is
A) 23
B) 127
C) 16
D) None of the above























2. Each statement beneath is either actual or FALSE. select the most improper 1 and ENTER in the “tear-off” sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

2.1 When the multiplier is 01 (decimal), Booth’s multiplication algorithm requires 1 addition and 1 subtraction.
2.2 A queue is a 1st –in 1st – out structure
2.3 When a right shift operation is performed on two’s complement numbers, zeros must be shifted from the left.
2.4 A software interrupt is an instruction executed by the CPU.
2.5 An instruction cycle always consists of 1 memory learn operation.
2.6 PUSH is a zero-address instruction.
2.7 In Boolean algebra Wx+ yx + Wy can be decreased to Wx+ yx.
2.8 Decoding on instruction takes place in several steps of the execution phase.
2.9 The set of microinstructions are stored in RAM.
2.10 An astable multivibrator can be used as flip-flop.

3. Match words and phrases in column X with the nearest related meaning/ word(s)/phrases in column Y. Enter your selection in the “tear-off” ans sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

X Y
3.1 Segment registers A. Immediate addressing
3.2 Cache memory B. Micro-controller
3.3 (ab)' = a' + b' C. NOP
3.4 A single chip computer D. Master/slave JK – Flip-flop
3.5 An instruction to give small delays E. 8086 CPU
3.6 Hamming code F. Hard Copy
3.7 Seek time G. RAM
3.8 LRU H. Error detecting and correcting code
3.9 Address is an operand I. Page replacement policy
3.10 Racing issues do not exist J. De-Morgan's theorem
K. Locality of reference
L. Hard disk reference














4. Each statement beneath has blank space to fit 1 of the word(s) or phrases in the list beneath. Enter your option in the “tear-off” ans sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

A. Faster B. I/O Mapped I/O C. Harvard
D. X E. Assembly F. Dirty
G. -128 H. Hamming distance I. -256
J. Logical AND K. I/O Pins L. Hamiltonian distance
M. 16

4.1 Y is the two’s complement of a number X. The 2 complement of Y will provide us _______.
4.2 The smallest negative integer that can be represented in 8-bit two’s complement notation is _______.
4.3 The _______ bit is used in a write back cache to avoid unnecessary updates of main memory pages.
4.4 A hardwired control unit is _______, when compared to a micro-programmed control unit.
4.5 Address lines and data lines are sometimes multiplexed in order to restrict the _______.
4.6 The kernel of an operating system is likely to be written in _______ language of the underlying processor in order to improve the performance.
4.7 In a grey code sequence, the _______ ranging from any 2 successive numbers is 1.
4.8 The number of 256 x four RAM chips needed to contract a 2KB cache is _______.
4.9 When input/ output is performed, using instructions such as IN and OUT which are meant for I/O devices, the mapping scheme used is called _______.
4.10 A digital computer, in which data memory is separated from instruction memory, is stated to have _______ architecture.



















PART TWO
(Answer all questions)

5.
a) Show, how cache memory may be organized in a computer?
b) Explain the need of memory hierarchy. What is the main cause for not having a large main memory for storing the totality of info in a computer system?
(6+9)

6.
a) When we write an assembly language program, elaborate the 3 essential columns that we include in every line? discuss the significance of every of these.
b) Write and discuss an assembly language program to subtract 2 numbers.
c) What is meant by a macro? Compare the relative merits and demerits of using macros instead of subroutines in a program
(5+5+5)

7.
a) Explain the difference ranging from combinational and sequential logic.
b) Explain how a JK flip-flop can be realized from a R-S flip-flop? What is Toggle flip-flop?
c) What is the difference ranging from zero – address, 1 – address and 2 address instructions? Illustrate with the help of examples.
(4+4+7)

8.
a) What is microinstruction? Distinguish ranging from horizontal and vertical microinstructions.
b) Explain the organization of control memory. How is control unit implemented using control memory?
c) What is the difference ranging from direct-address and indirect address mode? discuss relative and base – register addressing.
(4+6+5)

Earning:   Approval pending.