DOEACC Society 2007 Advanced Level Course In Computer Science A4-R3: COMPUTER ORGANIZATION - Question Paper

1.9 ORG 100 is interpreted by an assembler as

A) CPU instruction
B) The following instruction begins at 100 location in the memory
C) The following instruction begins at 101 location in the memory
D) A directive to execute the following instruction

1.10 Bi-directional buses use

A) Tri-state buffers
B) Two tri-state buffers in cascade
C) Two back to back connected tri-state buffers in parallel
D) Two back to back connected buffers
















2. Each statement beneath is either actual or FALSE. select the most improper 1 and ENTER in the “tear-off” sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

2.1 A 4x1 multiplexer can be designed with the help of 4 two input AND gates and 1 four input OR gate.
2.2 Booth’s algorithm is used to multiply negative numbers.
2.3 2’s complement of 101011002 is 010101002.
2.4 An IOP decreases performance of IO.
2.5 Static RAMs are used in Personal Computers as main memory.
2.6 Master slave J-K Flip Flop in configured from 2 J-K Flop Flops.
2.7 IN macros groups of instructions are not treated as single entities.
2.8 Horizontal microinstructions have little encoding.
2.9 A demultiplexer is needed to make output of ALU as 1 of its operands.
2.10 In an IO mapped IO additional IO instructions are needed to communicate with the IO device.

3. Match words and phrases in column X with the nearest related meaning/ word(s)/phrases in column Y. Enter your selection in the “tear-off” ans sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

X Y
3.1 Hexadecimal A. DMA
3.2 Memory Hierarchy B. Seven segment display
3.3 PUSH C. Daisy Chaining
3.4 Cycle stealing D. Locality of Reference
3.5 Interrupt Priority E. Increment in Sp
3.6 James E. Robertson F. Virtual Memory
3.7 High Speed Adder G. Stealing of Instruction Cycle
3.8 Implicit Addressing Mode H. 2's complement multiplication
3.9 Assembler directives I. Carry-look ahead
3.10 Control Unit J. Address out side op code
K. Carry Propagation Adder
L. Address is inbuilt in instruction
M. Executable statements
N. Non executable statements
O. CPU
P. Decrement in stack pointer













4. Each statement beneath has blank space to fit 1 of the word(s) or phrases in the list beneath. Enter your option in the “tear-off” ans sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

Earning:   Approval pending.