DOEACC Society 2007 Advanced Level Course In Computer Science A4-R3: COMPUTER ORGANIZATION - Question Paper

b) What is the role of an interrupt controller in a computer?
c) Describe the concurrency control and deadlock of an operating system.
(4+5+6)

A4-R3: COMPUTER ORGANIZATION

NOTE:
1. There are 2 PARTS in this Module/paper. PART 1 contains 4 ques. and PART 2 contains 4 ques..

2. PART 1 is to be answered in the TEAR-OFFANSWER SHEET only, attached to the ques. paper, as per the instructions contained therein. PART 1 is NOT to be answered in the ans book.

3. Maximum time allotted for PART 1 is 1 HOUR. ans book for PART 2 will be supplied at the table when the ans sheet for PART 1 is returned. However, candidates who complete PART 1 earlier than 1 hour, can collect the ans book for PART 2 immediately after handing over the ans sheet for PART ONE.
TOTAL TIME: three HOURS TOTAL MARKS: 100
(PART ONE-40; PART 2 – 60)

PART ONE
(Answer all the questions)

1. Each ques. beneath provide a multiple option of answers. select the most improper 1 and enter in the “tear-off” ans sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

1.1 One bit Full Adder can be designed using

A) Two Half Adders and 1 OR gate
B) Two Half Adders
C) One Ex-OR and 2 NAND gates
D) Two Ex-OR and 4 NAND gates

1.2 Octal number system is

A) A positional system with weights 0 to 9
B) A positional system with weights 0 to 8
C) A positional system with weights 0 to 7
D) A non positional system with weights 0 to 7

1.3 A four digit BCD number can be represented with the help of

A) 10 bits
B) 08 bits
C) 12 bits
D) 16 bits

1.4 A CPU consists of

A) ALU, Control Unit, and Registers
B) ALU, and Control Unit
C) ALU, Control Unit, and Hard Disk
D) ALU, Control Unit, and Key Board







1.5 In the memory hierarchy the fastest memory is

A) SRAM
B) Cache
C) CPU registers
D) DRAM

1.6 For execution of an interrupt applied at INTR, number of states needed by 8085 Microprocessor are

A) 4
B) 6
C) 12
D) 18

1.7 The Immediate addressing mode of instruction provides the operand in the memory location

A) Pointed by the PC
B) Next to that of OP code
C) Pointed by PC + 1
D) None of these

1.8 After execution of POP rp instruction in 8085

A) SP is decremented by one
B) SP is neither incremented nor decremented
C) SP is incremented by one
D) SP is incremented by two

Earning:   Approval pending.