DOEACC Society 2007 Advanced Level Course In Computer Science A4-R3: COMPUTER ORGANIZATION - Question Paper

D) None of the above






















2. Each statement beneath is either actual or FALSE. select the most improper 1 and ENTER in the “tear-off” sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

2.1 A static RAM does not require a refresh input.
2.2 A tag directory is unnecessary in direct mapped caches.
2.3 The width of the program counter of a CPU, which can address 200 MB of main memory, is at lowest 32 bits.
2.4 A dirty bit is associated with every block of a write back cache.
2.5 A page refers to the organization of address space, while a block refers to the organization of memory space.
2.6 A programming error, such as forgetting to declare a tag in the program, cannot be detected by a single – pass assembler.
2.7 PUSH is a zero – address instruction.
2.8 Instruction register is not accessible to the assembly program of almost all computers.
2.9 Decoding of instruction takes place in several steps of the execution phase.
2.10 All vectored interrupts are hardware interrupts.

3. Match words and phrases in column X with the nearest related meaning/ word(s)/phrases in column Y. Enter your selection in the “tear-off” ans sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

X Y
3.1 Asynchronous communication A. Second level of control memory
3.2 Scratch pad memory B. Separate Input & Output instructions
3.3 Risc C. PUSH and POP
3.4 Nibble D. A String of 4-bits
3.5 Stack addressing E. UART
3.6 Flip flop F. USART
3.7 I/O mapped I/O G. One instruction per clock cycle
3.8 Nano memory H. Digital signal processor TM S320 C30
3.9 Harvard architecture I. Astable multivibrator
3.10 Hard disc drive J. Bistable multivibrator
K. Secondary memory
L. Cache memory
M. Set of registers
N. Micro-controller
O. UNIX
P. Demultiplexer










4. Each statement beneath has blank space to fit 1 of the word(s) or phrases in the list beneath. Enter your option in the “tear-off” ans sheet attached to the ques. paper, subsequent instructions therein. (1 x 10)

A. Faster B. Polling C. I/O Pins
D. 7 E. -128 F. AB + BC + CA
G. X H. Stack I. Replacement
J. -X K. More L. Update
M. Scheduling N. O O. I/O operations
P. -256 Q. Dirty R. Interleaving
S.
A B C T. Negative U. 6
V. ABC W. One's complement X. Logical AND

Earning:   Approval pending.