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Visvesvaraya Technological University (VTU) 2011-4th Sem B.Tech Computer Science and Engineering Microprocessor Model , Common for Computer Science & Information science Engineering, - Questi

Thursday, 13 June 2013 03:25Web

Fourth Semester B.E Degree exam
Common to CS and IS)
Model ques. Paper I
Microprocessors
Note: ans any 5 Full questions, selecting at lowest 2 ques. from every PART

Time: three Hours Maximum marks : 100
PART A
Marks are in bracket.
1. a) discuss the internal architecture of 8086 microprocessor with a neat diagram. MARKS [10]

b) discuss any 5 addressing modes with an example for every. MARKS[10]

2. a) discuss the following: MARKS[12]

i) segment and ends ii) EQU iii) presume iv) ASCII codes

b) discuss briefly Assembler, Linker, Locator and debugger.MARKS[8]

3. a) Write a program to obtain biggest of 3 numbers. MARKS[5]

b) Write a program to add 1st eight natural numbers MARKS[5]

c) discuss all intersegment jumps along with their instruction formats.MARKS[5]

d) Write a delay procedure for producing approximately five milliseconds for 8086
microprocessor working at 5Mhz .MARKS[5]

4. a) Write a program to demonstrate passing parameters to procedures using general
memory. MARKS[10]

b) Compare macros and procedures. MARKS[5]

c) discuss the sequence of events in the stack during a far call procedure and ret. MARKS[5]


PART B

5. a) discuss the subsequent instructions with examples. MARKS[10]
DAA AAM CMPSB SCASB IDIV

b) discuss the subsequent directives with examples. MARKS[10]

DQ EVEN PUBLIC ORG BYTE PTR

6. a) Interface 16k RAM and 32k ROM to 8086 microprocessor using memory chips of
size 4k RAM and 4k ROM. presume suitable starting addresses for RAM and ROM. Use
decoders for interfacing. MARKS[10]

b) discuss the difference ranging from memory mapped I/O and directed mapped I/O MARKS[6]

c) How 8088 microprocessor accesses memory and ports MARKS[4]

7. a)Explain the action taken by 8086 when a interrupt occurs . discuss the interrupt
vector table. MARKS[10]

b) Explain, with the internal block diagram, the 8259A along with all the ICWs and OCWs. MARKS[10]

8. a) discuss with the internal block diagram of 8255 the various operational
modes and the necessary control words. MARKS[10]

b) discuss interfacing 8-digit 7 segment display unit to 8086 through 8255 device
operating in mode 0
MARKS[10]

END


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