Visvesvaraya Technological University (VTU) 2007 B.E Computer Science and Engineering Logic design - Question Paper

NMAM INSTITUTE OF TECHNOLOGY, NITTE
(An Autonomous College under VTU, Belgaum)
M.S.E. – I (Oct. 2009)
III Semester CSE
CS302 – LOGIC DESIGN
Time: one Hour Marks: 20
Note: ans Any 2 ques..
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1) a) Using K-Map method simplify subsequent Boolean expression:
F(A,B,C,D)= ?m(0, 1, 4, 5, 6, 8, 12, 14) - three marks
b) Simplify the provided function by QM method
F(A,B,C,D)= ?m(4, 8, 10, 11, 12, 15) + ?d( 9, 14) - seven marks

2) a) Implement the subsequent function with an eight X one MUX, with A,B & D connected
to choose line S2, S1, and S0 respectively.
F(A,B,C,D)= ?m(0, 1, 3, 4, 8,9,15) - five marks
b) discuss a 1-bit magnitude comparator. - five marks

3) Explain with logic circuit a 2-bit fast adder. Compare its delay with serial adder for generating nth carry bit. - 10 marks

Earning:   Approval pending.