Visvesvaraya Technological University (VTU) 2006 B.E Computer Science microprocessor 2 - Question Paper

Fourth Semester B.E Degree exam
(Common to CS and IS)
Model ques. Paper II
06CS45 Microprocessors
Note: ans any 5 Full questions, selecting at lowest 2 ques. from every PART
Time: three Hours Maximum marks : 100
PART A
1. a) With a neat diagram discuss the structure of a microcomputer 08
b) discuss with an example, the sequence of operations performed when
an instruction is being executed by the microprocessor. 08
c) Briefly explain the evolution of microprocessors. 04
2. a) Write and discuss the template for MOV instruction. obtain the machine code for
the subsequent instruction: MOV CS:[BX], AL 10
b) obtain and discuss the errors, if there are any, in the subsequent instructions:
i) MOV BH, AX
ii) IN AL, 280H
iii) DIV AL, BL
iv) PUSH CL
v) ROR AL, four 10
3. a) How are the flags of 8086 categorized? discuss every of the flag bits. 10
b) Write code segments to do the following:
i) avg. of four bytes stored in an array 05
ii) Convert packed BCD byte to 2 ASCII Characters, every representing a
digit in the packed BCD. 05
4. a) elaborate the sequence of operations that take place when a procedure is called 10
and when the control is returned from the procedure back to calling program?
b) Write a procedure to check whether the password entered is accurate or not.
(Assume a simple password of 6-10 characters length). 10
PART B
5. a) How do you take care of tags in a MACRO? provide an example. Write a macro to convert
the provided two digit BCD number to corresponding binary. 10
b) Write a delay loop to produce a delay of approximately 10 milliseconds in a
microprocessor working with 10 MHz frequency. 10
6. a) discuss the minimum mode configuration of 8086 with a neat diagram 10
b) define memory-mapped I/O and direct I/O. provide the main advantages
and disadvantages of every. 10
7. a) Briefly discuss the structure of Interrupt Vector Table with a neat diagram. 08
b) define the sequence of actions that an 8259A and an 8086 will take when
8259A receives an interrupt signal on its IR2 input. presume only IR2 is
unmasked in the 8259A and that 8086 INTR input has been enabled with a
STI instruction. 12
8 a) discuss the various methods of parallel data transfer. 10
b) discuss the control word register of 8255A in detail. 10

Earning:   Approval pending.