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Rajiv Gandhi Proudyogiki Vishwavidyalaya 2010-3rd Sem B.E Computer Science and Engineering cs dcs - Question Paper

Monday, 28 January 2013 02:25Web

CS/EI/BM-303
DIGITAL CIRCUIT AND SYSTEM
(Common for CS/EI/BM Engg,Branch)

Q.1 (a) (i) using 9's complements substract (63458-3354) [4]
(ii) Express decimal 5280 in excess-3 code . [4]
(b) Minimize the subsequent switching functions using the Karnaugh map. List all prime implicants and essential prime implicants :[12]
F(x1,x2,x3,x4) = (0,1,2,3,6,7,9,13,14,15 )
Q.2 (a) Minimize the subsequent fuctions using the Quine McCluskey method : [14]
F(x1,x2,x3,x4,x5) = (0,2,4,5,6,7,8,10,14,17,18,21,29,31) + d(11,20,22)
(b) Convert the subsequent : [6]
(i) (0.513)10 to octal
(ii) 673.124)8 to Binary
(iii) 1010.01101)2 to Decimal
Q.3 (a) Determine the prime-implicants of the function and minimized function : [10]
F(w,x,y,z) = (1,4,6,7,8,9,10,11,15)
(b) Design a parity generator to generate an odd parity bit for 4-bit word.Use NAND gates only. [10]
Q.4 (a) Design a Full-Adder with 2 Half Adders and an OR gate ? [9]
(b) Design a BCD to Excess-3 code converter using the minimum number of NAND gates ? [11]
Q.5 (a) discuss the operation of monostable multivibrator with the help of necessary diagram and waveforms.Describe the applications of it. [12]
(b) Determine the frequency of oscillation for the free running multivibrator circuit shown beneath.It is provided that RA=RB=1Kohm and C=1000pF.Also compute the Duty Cycle.[8]
Q.6 (a) How many Flip-Flops are needed to construct a MOD-128 Counter ?A MOD-32 ? What is the largest decimal number that can be stored in a MOD-64 Counter ? [5]
(b) What modulus counters can be constructed with the use of 4 flip-flops ? [5]
(c) Design a 4-Bit Johnson Counter ? [10]
Q.7 (a) define the successive approximation A/D converter with the help of necessary diagram and waveforms ? [10]
(b) For a 5-bit resistive divider determine the subsequent : [10]
(i) The weight assigned to the LSB.
(ii) The weight assigned to the 2nd and 3rd LSB.
(iii) The change in Output voltage due to a change in the LSB the 2nd LSB and 3rd LSB .
(iv) The output voltage for a digital output of 10101 presume 0= 0V and 1= +10 V
Q.8 Write short notes on ant threee of the subsequent : [20]
(i) Sample and Hold Circuit
(ii) 2-bit simultaneous A/D converter
(iii) PLA
(iv) ECL



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