Guru Gobind Singh Indraprastha Vishwavidyalaya 2005 B.Tech Digital circuits and systems - Question Paper

End-Term exam
Fourth Semester [B.Tech] - May 2005

Paper Code : ETEC – 206 Subject : Digital Circuits and Systems

Time : three Hours
Maximum Marks : 75

Note : Attempt any five ques. in all.


Q1 ( a ) Simplify the subsequent Boolean function:

z = ( (A+B)' + B' )'


( b ) discuss DeMorgan's laws.

( c ) Show the logic diagram of boolean function of Q.1 a using NAND gates.


Q2 ( a ) provide 1 word ans to the following:

1) A digital circuit that performs the inverse operation of a decoder.
2)A combinational circuit that receives binary info from 1 of 2n input lines and directs it a single output line.
3) A combinational circuit that performs the arithmetic addition of 2 bits.
4)A code that can support only 1 bit change.
5)A sequential circuit that suffers from race around condition

( b ) Design a two to four decoder using NAND gates. 5

( c ) Compare digital signals with Analog signals, clearly stating their merits and demerits. 5


Q3 ( a ) What is the simplified boolean formula for the Karnaugh map of the figure provided below:
VX YZ 00 01 11 10
00 one
01
11 one one one
10 one one one one


( b ) Draw the equivalent logic circuit of the simplified formula. 5

( c ) Implement a four to 16 decoder using ROM. 5



Q4 ( a ) Justify the subsequent statements:

Hamming code can be used to detect & accurate multiple bit parity errors.
DRAM is faster than SRAM.
Packing density of CMOS logic is higher to bipolar logic.
555 timer is a digital device.
Wire ANDing is possible with TTL devices.



( b ) discuss the functioning of Mod-8 ripple counter. 5



Q5 ( a ) Differentiate between:
PAL and PLA devices.
EPROM and EAROM.
NMOS and PMOS logic families.
Astable and Monostable multivibrators.
Synchronous and Asynchronous counters.




Q6 ( a ) obtain the dual of hte followin gexpressions
( x y' + y z + x y' z) x y z


( b ) What is the cannonical form of logic expression? discuss minterms and maxterms. 4

( c ) What is a mod-5 counter. How it is designed. How a decade counter can be realized using mod-5 counter.



Q7 ( a ) discuss the function of a multiplexer. provide an example of multiplexer IC. 5

( b ) What is the difference betweeen n-bit register and n-bit latch. 4

( c ) What is a flip-flop. discuss how an S-R flip flopis realized by employing:
(i) NOR gates (ii) NOR gates 6



Q7 Write short notes on any 3 of the following:


( a ) Memory organization

( b ) Content Addressable Memory

( c ) Code convertors

( d ) Comparators

Earning:   Approval pending.