Guru Gobind Singh Indraprastha Vishwavidyalaya 2005 B.Tech Computer Architecture - exam paper

Fifth Semester [B.Tech] - November 2005

Paper Code : ETCS – 305 Subject : Computer Architecture

Time : 11/2 Hours
Maximum Marks : 30

Note : Attempt any three ques. in all. Q1 is compulsory. every ques. carries 10 marks.


Q1 ( a ) In a certain scientific calculation it is necessary to perform the arithmetic operation (Ai + Bi)(Ci + Di) with a stream of numbers. Specify a pipeline configuration to carry out this task. List the contents of all the registers in the pipeline for i=1 to 6.


( b ) provide Flynn's classification Computer Architectural schemes. four
( c ) A non-pipelined system takes 50ns to process a task. The identical task can be processes in a six-segment pipeline with a clock cycle of 10ns. Determine the speedup ratio of the pipeline for 100 tasks. What is the maximum speedup that can be achieved? Also determine the efficiency of this pipeline. three


Q2 ( a ) discuss in detail the PCI bus architecture. Also explain PCI bus arbitration.

( b ) What do you mean by null modem? Where is it used?

( c ) Briefly differentiate ranging from Cisc and Risc architectures. four


Q3 ( a ) The logical address space in a computer consists of 128 segments. every segment can have up to 32 pages of 4K words in every. The physical memory consists of 4K page frames of 4K words in every.
Formulate the logical and physical address formats. (3)
provide the binary number of the logical address for the segment 36 and word number 2000 in page 15. (2)

( b ) What do you mean by a page fault? Briefly explain 1 of the page replacement policies. two
( c ) explain any 2 address translation schemes used in virtual memory environment. three


Q5 Write short notes on :

( a ) RS-232

( b ) EISA

( c ) Device drivers

Earning:   Approval pending.