Guru Gobind Singh Indraprastha Vishwavidyalaya 2005 B.E Electrical and Electronics Engineering Electrical Technology - Question Paper

this frequency down to one Hz, it is necessary to have
(i) 2 decade counters, 1 2 bit binary counter and a T flip- flop.
(ii) 3 decade counters, 1 4 bit binary counter and 1 T flip-
flop.
(iii) 1 4 bit binary counter and T flip- flop and 1 decade counter.
(iv) 4 four bit binary counter and decade counter.

(j) The number of flip -flops needed to build a mod-19 counter is
(i) four
(ii) five
(iii) six
(iv) seven

(k) Which of the subsequent flip-flops do not have race problem?
(i) T flip- flop
(ii) D flip-flop
(iii) JK flip- flop
(iv) Master Slave flip -flop

(l) For emitter coupled logic, the switching speed is very high because
(i) negative logic is used
(ii) the transistors are not saturated when conducting
(iii) emitter coupled transistors are used
(iv) multi- emitter transistors are used

(m) Fan out for the 74 series is
(i) four
(ii) five
(iii) eight
(iv) 10

(n) The number of comparator circuits needed to build a three- bit.
Simultaneous A/D converter is
(i) seven
(ii) eight
(iii) 15
(iv) 16

(o) An D/A converter uses a ladder of +10V full scale output. The number of
bits needed at its input for a resolution of five mV will be
(i) seven
(ii) eight
(iii) nine
(iv) 11

(p) An DRO memory can be converted into NDRO memory by employing
(i) decade counters
(ii) storage registers
(iii) address registers
(iv) inhibit lines

(q) The number of matrix planes needed to store a 20 bit word in a memory
array is
(i) two
(ii) 10
(iii) 20
(iv) 40

(r) Which of the subsequent characteristics is not actual for TTL logic
(i) Good speed
(ii) Lower power dissipation per gate
(iii) High Cost
(iv) None of these

(s) Which of the subsequent logic is the fastest
(i) TTL
(ii) ECL
(iii) CMOS
(iv) LSI

(t) Which of the subsequent logics has the fan out of more than 50
(i) TTL
(ii) 5- n sec ECL
(iii) 8- n sec ECL
(iv) CMOS

(u) Which of the subsequent logics has excellent noise margin
(i) TTL
(ii) ECL
(iii) CMOS
(iv) All of these

(v) What is the function implemented by the subsequent multiplexer chip
(i) ***
(ii) ***
(iii) F(A,B) = A
(iv) F(A,B) = B

Q.2 (a) Perform the subsequent operations using 2’s complement method
(i) 48- 23
(ii) 23- 48
(iii) 48- (- 23)
(iv) –48–23
Use 8- bit representation of numbers.
OR

(b) Write short notes on any 3 of the following:
(i) Excess-3 Code
(ii) Gray Code
(iii) Alphanumeric Codes
(iv) Natural BCD Code

Q.3 (a) (i) Simplify the logic expression provided below, where m represents
minterms.
F(A,B,C,D,E) = S m(0,5,6,8,9,10,11,16,20,24,25,26,27,29,31)
(ii) Write short notes on the following, JK flip- flop, S-R flip- flop, the
race around condition, D kind flip- flop, T kind flip-flop, edge triggered flip -flops

(OR)
(b) (i) Design a three bit synchronous counter using JK flip flops.
(ii) Design a MOD-6 ripple up- counter that can be manually reset by
an external push button

Q.4 (a) discuss the subsequent D/A and A/D converters
(i) Weighted-Resistor D/A converter
(ii) R-2R Ladder D/A converter
(iii) Dual Slope A/D converter

(OR)

(b) explain about the subsequent memories in detail
(i) Sequentially accessed memory
(ii) Content addressable memory
(iii) learn Only Memory


Q.5 (a) (i) describe the subsequent characteristics of digital ICs, Speed of
operation, Power dissipation, Figure of merit, Fan out and Noise immunity.
(ii) discuss the logic families provided beneath and also provide their
necessary characteristics and diagrams RTL, DCTL, I2L, ECL.

(OR)

(b) (i) Draw and discuss the operation of TTL NAND Gate
(ii) Draw a TTL gate with totempok output driver and discuss its
operation.

Earning:   Approval pending.