Guru Gobind Singh Indraprastha Vishwavidyalaya 2008-2nd Year B.C.A Computer Application Digital Electronics, Second Semester, End Term , Year , , - Question Paper
__Second Scmcster [BCA] Mav-2008
Papar Coda:BCA-109 Subject: Digital Electronic* I Papar kt:20108 BtChj200S-2007l j
Tim* JHouri _ ____________ Maximum Mar** Jn
[Not*: 01. i* eompufsory. Attempt on* quttfon from each part. ____I
Qi if) Sate arx) expvn the DeMorgan's theorem wfietr conven s turn into a product Form am)
wce-**rs* (8)
/
4) Design a full adder circuit uang only NOR gam Wnat relations has ft lo the half-adttr creut (5)
Jfi) rs a osmtftptexer' Expn the dflerer<co between a DEMUX and MUX (5)
' tfl) Discus* ftt rifferenoe between oombnaranai and sequential Ogc (8)
'(e) Wny are shift registers considered to be basic memory deviCM? {8)
J PAHT-A
02 (a) Express the function V A* B C ** () Canonical SOP and (b) Canoneal POS form (b) Explain the terms (0 pnme .mplcart () input varette () mimerrn er3 (tv) moxterm
03 (a) Ftearfse(l> YA+BCD uehg NANO gate* and (118)
/ <k) Y*(A*CKA + D)(A + B + C) uengNORgatss
(b) Realise the toiownfl function uetg (0 nutiav*! NANO-NANO network and <#) muMevei NOR NOR network. __ _
Y AB + 9(C*D)+FF(B*D)
PART-6
04 (a) Show how a ful adder can be wivarted to a fiil rjbtrscw 4th the aMitton 01 ar nvatjer
ereut (12.8)
(6) EKHatn(i) Ho-8 demutbolexer() 1-lo-16demiitap'xer
05 (a) Oeana peralW b)rarynuillplrrtmkAf9liesa4-OR numberby a3tKt
number AsAA* to form the product CBCtCtCiCjCsCfCg (12.8)
(b) Oraw the logic diagram ot IC7410O parity generetorJchecker and explatn cs operate* *th me help & a truth table
PART-C
_ Qm. (a) Explain the function o< a D ftp-top usmg a tunable dagram and discuss how A works as
a letch (12.8)
(b) Show that a J-K np-flop can be converted lo a 0 ftp-Aop Hh an inverter between the J and K .nputs
QT (a) Explain the operation of 'raster-slave 'ip-flcp and show how the race around cortdtaon
ahmnated ri <? (12.5)
(b) Whai the mor d<teranos the operation of adge-viggered fl-f1ope and master olove fWp-tops?
PART-0
Oft fa) -What a nppto eounter' What factor* determine Mhetn- a counter operates as a cojftt*
up or countdown counter? (12.5)
(b) Whel ts a modulus counlarOraw the (ogedeam or a 4 bit binary rpple cotnter usng flipope that tngger on the posmv*edge traneocn
06, (a) What s a ROM? Expl*n the term* (a) Voletfe mwrory (b) Non Volatile memory (12.8)
(b) Oescrtoe and compere sequential access memo'tas. random scctii nemones and read 0y memories
Attachment: |
Earning: Approval pending. |