Cochin University of Science and Techology (CUST) 2005-5th Sem B.Tech Computer Science and Engineering Iester , , CS 404 COMPUTER ARCHITECTURE AND ORGANIZATION - Question Paper
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BTS(C)> IV -05 -020(C)
B.Tech. Degree IV Semester Examination, May 2005
CS 404 COMPUTEfe ARCHITECTURE AND ORGANIZATION
(2002 Admissions Onwards)
: 3 Hour? Maximum Maries
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(a) Whal i menu by Addressing modes or a processor? Explain various possible addressing mode* of a processor with examples.
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(b) Write down the general rules for performing arithmetic openaiions on floating point numbers.
(c) Represent the decimal values 26 and -37 as 5-bil numbers in the following binary Formats;
(i) Sign-magnitude (ii) 2's complement
Also write down the binary format for the BCD representation of 59.
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(a) With a block diagram explain the algorithm for division of binary integers by any one method. Explain the operation of the system for division of 6 by 3.
(b) In a particular system 8 bits are used for representing numbers. The MSB is sign bit. mantissa fraction is 4 bits and the 3-bit signed exponent is io excess 3 format. What is the range of values that can be represented by the system? Assume that the mantuisa pan is to be read as I.M. where M is tbe mantissa represented by the system
(c) Perform binary multiplication of 13 and -6 by any three methods. Hence compare the methods.
(a) With a neat diagram explain the single bus organization of the data paths inside a CPU. Hence write down the control sequence for the execution of an arithmetic instruction with indirect addressing mode.
(b) With a block diagram explain the operation of a hardwired control unit. Also explain the use of P1.A in the design of control unit.
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(a) Describe the basic structure of a micro programmed control unit.
(b) Compare micro programmed control and hardwired control.
(c) Write sbon notes on:
(I) Microinstruction prefetching (ii) Emulation
(a) Draw the logic symbol of a 4Mx8 bit RAM.
(b) What is meant by memory interleaving? Explain. What is the advantage of memory interleaving?
(c) With a neat diagram explain the organization of a typical IKxl memory chip.
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(a) Compare the various memory technologies in terms of speed, size and cost.
(b) Explain sei>a*ociate- mapped cache with an example.
(c) Explain the LRU algorithm
(a) Explain the sequence of events when a processor receives an interrupt request.
(b) Explain tbe following:
(i) Vectored Interrupts (ii) Interrupt Priority Management OR
(a) List out tbe major functions of an I/O interface circuit
(b) With a block diagram explain a keyboard to processor interface circuit.
<c) Explain various bus arbitration schemes.
(a) What is multiprocessing? Briefly explain the following multiprocessor systems:
(i) Loosely coupled (ii) Tightly coupled
(b) Compare RISC and CISC machines. Also give some examples for both types.
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(a) Briefly explain different approaches to enhance vector processing capability.
(b) What is meant by cache coherence? Briefly explain different methods for solving the cache coherence problem.
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