Rajasthan Technical University 2009-3rd Sem B.E Electrical Engineering : (- ) Power Electronics-1 - Question Paper
Rajasthan tech. University(RTU)
B.Tech III sem. Main exam
January 2009
Power Electronics-1
Use o (Menlio
1.
2.
Nil
Hnmpt five questions in all. Schematic diagrams must be *n wherever necessary. Any data you feel missing may suitably be assumed and stated clearly.
owing supporting material is permitted during exami'rfatton. , in form No. 205)
3E1481
r 3 Teeh. (Sem.lll) (Main/Back) Examination, January - 2009, pM U H1) Power Electronics - I
Electrical Engineering)
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1 ;; xplain the effect of temperature on V-I characteristics of N junction diode for (i) Highly doped junction (ii) Lightly loped junction.
* 8
i
(b; Explain the V-I characteristics, construction and working Along with energy band diagram for an L.E.D.
"8
. OR
1 _{a) f'.xplain the construction, characteristic and Working of
(j . ' hotovolatic diode.
8
' xplain the phenomenon of avalanche and zener breakdown. Also explain the Working of zener diode as a voltage regulator.
8
111
3E1481] 1 [Contd...
* 3 E 1 4 8 1
(i) v, C-1|IF
10V -20V |
|
!"X
4 vtuv$
R |
R=10k
\ww
(iv)
'k
10V
i
Vj =20sinwt
4x4=16
OR
F6r a half wave rectifier with resistance load and capacitor filter, derive approximate expression for BCVDC and ripple voltage . Prove that the ripple factor is
1
approximately equal to 2->/3 C iJj,
Draw the circuit arid describe the operation of a bridge rectifier. What are the merits and limitations of this circuit ?
[Contd...
111
* 3 14 8 1
h-paxameters are :
hfe =2.5xl0"4
j 100 ohms, >0
ice the values of : current gain Aj I0jli
/oltage gain Ay = V0/Vi
v oltage gain AVs = V0/V8
.< nput resistance *
16
rove Vce < for thermal stability of BJT.
3
alculate any two stability factors for the given circuit :
:22k ?1#k
15JIF
Hh
L v<
b 40J1F I
\ 820121
J
) Sketch the structure df n-chahnel junction field effect transistor. Explain its common source drain characteristics; Why is it not possible for the channel to dose completely ?
OR
m
0 Show that the transconductance gm of a JFETi
to the drain current .Ijyg- by : |*7 '.> TM
2 r* _ -.1/2
8m = N * [IjDSS' !ds]
8
0 Explain CMOS devices. Give their important features and characteristics.
\
0 Calculate the voltage gain of the FET amplifier shown in figure below :
0.0511F -il- |
Vj (~) 10MQ:
750Cp20HF
Given
yDS = 40JIS Idss = 8 mA VGS(off) = 4V VGSQ = -1-8V
8
)) Explain Darlington pair and need of Boot-strapping in it.
OR
i ) Draw and explain R-C coupled BJT amplifier with frequency response and also calculate gain at (i)' low frequency
(ii) Mid band frequency (iii) High frequency
10
) Explain Millers Theorem and its Dual.
6
J t 1 4 8 1
Attachment: |
Earning: Approval pending. |