Rajasthan Technical University 2009-8th Sem B.E (Main/Back) Computer aided design for vlsi - Question Paper
Rajasthan tech. University
B.E. eight sem (Main/Back)
branch: Computer engineering
Computer aided design for vlsi
paper comatns j pnmzu pages.
8} 28 Paper III
IV B.E. (VIII SEMESTER) (MAIN/BACK) EXAMINATION, 2009
' (New Four Year Semester Scheme)
[Branch : Computer Engineeringj Paper III
COMPUTER AIDED DESIGN FOR VLSI
Time Allowed : Three Hours Maximum Marks 80
(1) No supplementary answer-book will be given to any candidate. Hence the candidates should write the
answer precisely in the Main answer-book only.
(2) All the parts of one question should be answered at one place in the answer-book. One complete question should not be answered at different places in the answer-book.
Attempt any five questions.
All questions carry equal marks.
1. (a) Why do we need to design Integrated Circuit? 3
(b) .What are different problems that designers must juggle in designing Integrated Circuit? 3
(c) Explain Hierarchical design technique of IC. 7
(d) Draw a circuit of an Inverter Implemented in Bipolar (RTL), n-mos and cmos.
2.'(a) Draw hierarchy of design abstraction and explain function and cc&fcanalysis in that process. 4
(6) What is design abstraction? Draw a transistor-level and mixed schematic of Dynamic latchup. 6
(c) Explain steps involved in twin-tub process of a wafer. 6
3. (a) What is Latchup in chip? Explain parasitics that
cause latchup. 4
(b) Explain wire parasitics. . 4
(c) Explain skin effect in copper interconnect wires in layout ckt.
(d) Define design rule checker and circuit extractor. 4
4. (a) .Why are scalable design rules necessary?
State
8
rules for metal 2.
(b) Sketch stick diagram for following:
(i) Dynamic Latch
4
(ii) Two-input NAND.
4
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5. (a) How does a barrel-shifter perform shifts and
rotates? 8
(b) Explain static RAM with net diagram. 8
6. (a) How are the problems of leaks eliminated in
Dynamic iatch? Describe the operation of Dynamic latch. . 8
(b) Draw diagram for regenerative latch. 4
(c) Explain flip-flop clocking rule-1. 4
7. Explain the process involved in Sequential System design taking any suitable example. 16 '
8. Wrhe short notes on any two:
(i) Fabrication errors
(ii) Hierarchical stick diagram
(iii) Kitchen Tinier chin
(iv} Two phase j.ystem for latches. 8x2
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| Earning: Approval pending. |
