Biju Patnaik University of Technology 2008-4th Sem B.Tech (B Tech) , physics of semiconductor device . - Question Paper
BPUT(B Tech) , fourth semester physics of semiconductor device ques. paper. Total number of printed pages -7 B. Tech BSCP2202
Fourth Semester Examination - 2008 PHYSICS OF SEMICONDUCTOR DEVICES Full Marks-70
Time: 3 Hours
Answer Question No. 1 which is compulsory and any five from the rest. t
The figures in the right-hand margin indicate marks.
Assume any data if not given in the question. You may use the physical constants given anywhere in the question paper.
1. Answer the following questions : 2x10
(a) Calculate the electron and hole concentration in a semiconductor in thermal equilibrium if intrinsic carrier concentration is
1.5 x 1 o10 cm-3 and holes are 36 x 1 o4 times than the electrons per cm3.
(b) Conduction in a p-type semiconductor is due to holes in the conduction band. State whether the statement is true or false. Justify your answer.
(c) What is Einstein relation ? Write down the expression and define the terms.
(d) Explain the process of excess carrier generation and recombination.
* I (e) Drawthe energy band diagram of a reverse i J
e biased p-n junction.
(f) Differentiate between Zener breakdown and Avalanche breakdown.
(g) If two p-n junction diodes are connected, such that both p sides are together, will the combined circuit behave as a transistor ? Give reasons for your answer.
(h) Define Flat-Band voltage in a M O S.
(i) Draw a C M O S invertor circuit.
(j) If (3 of a transistor is 50, calculate a and Y.
2. (a) Derive the expression to determine the
position of the Fermi energy level as a function of the doping concentration and temperature. 5
(b) A semiconductor material made of silicon has an acceptor impurity concentration of Na = 1016 per cm3. Calculate the concentration of donor impurity atoms that must be added so that the semiconductor is n-type and the Fermi energy is 0.13 eV below the conduction band edge.
Assume kT = 0.26 eV. 5
3. (a) What is drift current ? Derive the expres
sion for drift current density. 1 +4
(b) A semiconductor sample of Ga As at 300K has doping concentration Na = 0 and ND = 1016 per cm3. If the electron and hole mobilities are 8500 and 400 Cm2 per BSCP 2202 3 P.T.O.
volt.sec respectively, calculate the drift current density under complete ionisation.
5
4. (a) Why is the general ambipolar transport
equation nonlinear? 4
(b) A semiconductor has the following : n0 = 1015 cm-3 n; = 1010 cm-3
Excess carrier lifetime is 10-6 s. Determine the electron-hole recombination rate if the excess-hole concentration is 5*l013crrr3. 6
5. (a) Calculate the built-in potential barrier in a
p-n junction given that 3
Semiconductor = Silicon
Temperature = 27C
Na = 1.5 xio18crrr3
Nd = 1xio15cm-3
Thermal voltage = 0.26 eV
n; = 1.5 xio10crrr3 BSCP 2202 4 Contd.
(b) Show that the total space charge width increases as a reverse bias voltage is applied. 5
(c) Determine the total width for Q5(a) if relative permittivity of the semiconductor is 11.7 and voltage applied is 5V. Assume permittivity in free space to be8.85 *10-14 F/cm.
2
6. (a) Calculate the ideal reverse saturation current density in a silicon p-n junction of 300K temperature, where, 3
|
Na = |
Nd = 1016 cm-3 |
|
n. |
1.5 xlo10cm-3 |
|
Dn = |
25 cm2/s |
|
ii Q. o |
10 cm2/s |
|
Tpo = |
no = 5x10 7 S |
|
er |
11.7 |
(b) Describe with illustrations how amplification takes place in a bipolar junction transister.
5
(c) Draw the bi polar transistor common-emitter V-l characteristics. Indicate saturation, cut off an active region. Mention significance of load line. 2
7. (a) Is MOS a voltage controlled or current controlled device ? Give reasons. 3
(b) Draw the energy band diagrams of MOS capacity with p-type substrate when a negative gate bias and a moderate positive gate bias is applied. Repeat for n-type substrate when positive gate bias and a moderate negative gate bias is applied. 5
(c) Calculate the oxide capacitance for M O S
0
where thickness tox = 500 A and relative permittivity is 3.9. 2
8. Write short notes on :
(a) CMOS technology
2.5x4
(b) Hybrid - pi Model
(c) Frequency limitations in MOS
(d) Diffusion current.
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Attachment: |
| Earning: Approval pending. |
