Shivaji University 2010-4th Sem B.E Computer Science and Engineering S.E.(Computer sci& engg.) , COMPUTER ORGANIZATION - Question Paper
Sunday, 19 May 2013 12:50Web
S.E. (Computer Sci. & Engg.) (Semester-IV) Examination, 2010
COMPUTER ORGANIZATION
Instructions: 1)Solve any two ques. from every part.
2)Figures to the right indicate full marks
part - I
1. a) Write HDL description of the multiplier for eight bit twos complement fractions. 6
b) discuss floating addition and subtraction with example. 6
2. a) discuss Booths algorithm for twos complement multiplication. 6
b) discuss possible instruction set for simple accumulator base CPU. 7
3. a) discuss instruction set of the IAS computer. 6
b) Compare Risc and Cisc. 6
part – II
4. a) discuss the basic concept for the internet structure of Data-path circuit and C.U. for small microprocessor. 6
b) Draw and discuss general structure of a micro-programmed control unit. 7
5. a)Explain micro-programmed control unit. 6
b) discuss micro-instruction addressing. 6
6. a) discuss 2 and 3 level memory hierarchies. 6
b) discuss look - aside system organization for cache. 6
Earning: Approval pending. |