Shivaji University 2007 B.E Computer Science COMPUTER ORGANIZATION - exam paper
Sunday, 19 May 2013 10:45Web
H-163
SECOND YEAR OF COMPUTER SCIENCE AND ENGINEERING (PART-2) EXAMINATION, 2007
SHIVAJI UNIVERSITY, KOLHAPUR
COMPUTER ORGANIZATION
Day and Date: Friday, 25-11-2007 Total Marks: 100
Time: 2.30p.m. To 5.30p.m.
Instructions: 1) Q.1 from section-1 and Q.5 from section-2 are compulsory.
2) Solve any 2 ques. from Q.2, Q.3, and Q.4
3) Solve any 2 ques. from Q.6, Q.7, and Q.8
4) Figures to right shows full marks
SECTION-1
Q.1 a) Compare Risc and Cisc processors.[Marks 7]
b) Draw 4-bit carry look ahead adder. Considering all blocks of the circuit require equal delay of ‘d’units, what is the time require to perform a 4-bit addition in terms of‘d’.[Marks 8]
Q.2)a) Draw a non-restoring division algorithm. Illustrate with an example. [Marks 7]
b) Perform the subsequent operations suggested: [Marks 8]
1) (17)*(-12): Booths multiplication
2) (41)/ (11): Restoring division
Q. three a) provide the detail design and working of binary fixed point multiplier.Marks 10]
b) Draw a block schematic indicating the data processing part of a simple floating-point arithmetic unit.[Marks 5]
Q.3 a) discuss desirable features of an instruction .Also define the meaning of the term “completeness”.[Marks 8]
b) define the advantages of PLA what is meant by folded PLA and decoded PLA?[Marks 7]
SECTION-2
Q.5 a) discuss the working of microprogramming sequencer with help of neat diagram.[Marks 8]
b) discuss the operation of paged segmentation arrangement.[Marks 7]
c) describe programmed I/O. provide its advantages and disadvantages with respect to design complexity, I/O bandwidth and interface hardware costs.[Marks 5]
Q.6 a) with a suitable diagram, discuss non-preemptive allocation algorithm for main memory.[Marks 5]
b) A typical CPU allows most interrupt requests to be enabled and disabled under software control, in contrast, no CPU provides Facilities to disable DMA request signals. discuss why this is so.[Marks 5]
c) explain the design steps involved in design of hardwired control unit using delay element method. [Marks 5]
Q.7 a) discuss the design of multiplier control unit using 1 hot method.[Marks 8]
b) discuss the steps involved in the optimization of control memory in micro programmed control unit.[Marks 6]
c) Differentiate ranging from Static RAM and Dynamic RAM.[Marks 6]
Q.8 a) discuss the working of interrupt driven I/O.[Marks 7]
b) discuss the factors that will affect the Performa Nance of hierarchical memory system.[Marks 8]
Earning: Approval pending. |