Shivaji University 2007 B.E Computer Science MICROPROCESSOR-1 - exam paper

Y-509
SECOND YEAR OF COMPUTER SCIENCE AND ENGINEERING (PART-2) EXAMINATION, 2007
SHIVAJI UNIVERSITY, KOLHAPUR
MICROPROCESSOR-1

Day and Date: Friday, 27-11-2007 Total Marks: 100
Time: 10.00a.m. To 1.00p.m.

Instructions: 1) Q.1 from section-1 and Q.5 from section-2 are compulsory.

2) Solve any 2 ques. from Q.2, Q.3, and Q.4
3) Solve any 2 ques. from Q.6, Q.7, and Q.8

SECTION-1

Q.1 a)State whether true/false. Justify (any five)[Marks 10=2*5]

1) POP D is data transfer of instruction.

2) ALE signal is needed because higher order bus is multiplexed with data in 8085.

3) 'Opcode FetCh ’machine cycle is of 4t states for all instructions.

4) RST 4.5 pin causes microprocessor 8085 to go in to ‘WAIT’ state.

5) If register H=OOH, L=OIH, then by using DCX h instruction will set zero flag.

6) RST5 is a direct addressing mode kind instruction.

b)Accumulator A contains 11H. What flags will be affected by executing subsequent program excerpt?[Marks 4]

MVI B, 2BH
CMP B
HLT

c) discuss the function of READY signal of 8085 with timing diagram.[Marks 6]


Q.2 a) discuss the memory mapped I/O mode used in 8085. [Marks 6]

b) discuss the execution of the subsequent instruction in every machine cycle.[Marks 9]

8085 H CC 9700 H

Q.3 a) presume that the accumulator contents data bytes 88 hand instruction MOV C, A 4FH is fetched. List the steps decoding and executing the instruction.[Marks 8]

b) discuss the control and status signals of 8085.[Marks 5]



Q.4 a) discuss single stepping with diagram.[Marks 8]

b) discuss with timing diagram instruction of IN 82 H.[Marks 7]


SECTION-2

Q.5 a) with the help of 8279 block diagram explains display part of 8279. [Marks 8]

b) Interface ADC 0809 to the microprocessor with 8255 .Select input channel two for conversion.[Marks 7]



Q.6 a) Explains in detail synchronous transmission and synchronous receptors.[Marks 8]


b) With the help of block diagram discuss successive approximation. [Marks 7]

Q.7 a) discuss the sequence of operations for DMA transfer using HOLD and HALD signal.[Marks 7]

b) discuss the subsequent command word formats for 8279.[Marks 8]

1) Clear mode

2) Keyboard/display mode



Q.8 a) Draw and discuss the block diagram for 8251.[Marks 8]

b) Draw the interfacing for ADC 0809 WITH 8085.[Marks 7]

Earning:   Approval pending.